ASxxxx Assemblers
and
ASLINK Relocating Linker
Version 5.50
September 2023
Table Of Contents
CHAPTER 1 THE ASSEMBLER 1-1
1.1 THE ASXXXX ASSEMBLERS 1-1
1.1.1 Assembly Pass 1 1-2
1.1.2 Assembly Pass 2 1-2
1.1.3 Assembly Pass 3 1-3
1.2 SOURCE PROGRAM FORMAT 1-3
1.2.1 Statement Format 1-3
1.2.1.1 Label Field 1-4
1.2.1.2 Operator Field 1-5
1.2.1.3 Operand Field 1-6
1.2.1.4 Comment Field 1-6
1.3 SYMBOLS AND EXPRESSIONS 1-7
1.3.1 Character Set 1-7
1.3.2 User-Defined Symbols 1-11
1.3.3 Reusable Symbols 1-12
1.3.4 Current Location Counter 1-13
1.3.5 Numbers 1-15
1.3.6 Terms 1-15
1.3.7 Expressions 1-16
1.4 GENERAL ASSEMBLER DIRECTIVES 1-18
1.4.1 .module Directive 1-18
1.4.2 .title Directive 1-18
1.4.3 .sbttl Directive 1-19
1.4.4 .list and .nlist Directives 1-19
1.4.5 .page Directive 1-21
1.4.6 .msg Directive 1-21
1.4.7 .error Directive 1-22
1.4.8 .byte, .db, and .fcb Directives 1-22
1.4.9 .word, .dw, and .fdb Directives 1-23
1.4.10 .3byte and .triple Directives 1-23
1.4.11 .dl, .long, .4byte, and .quad Directives 1-24
1.4.12 .blkb, .ds, .rmb, and .rs Directives 1-24
1.4.13 .blkw, .blkl, .blk3, and .blk4 Directives 1-25
1.4.14 .ascii, .str, and .fcc Directives 1-25
1.4.15 .ascis and .strs Directives 1-26
1.4.16 .asciz and .strz Directives 1-26
1.4.17 Non-Printing Characters In Strings 1-27
1.4.18 .assume Directive 1-27
1.4.19 .radix Directive 1-28
1.4.20 .even Directive 1-28
1.4.21 .odd Directive 1-28
1.4.22 .bndry Directive 1-29
1.4.23 .area Directive 1-30
1.4.24 .psharea and .poparea Directives 1-33
1.4.25 .bank Directive 1-34
1.4.26 .org Directive 1-35
1.4.27 .globl Directive 1-35
1.4.28 .local Directive 1-36
1.4.29 .equ, .gblequ, and .lclequ Directives 1-37
1.4.30 .if, .else, and .endif Directives 1-37
Page ii
1.4.31 .iff, .ift, and .iftf Directives 1-38
1.4.32 .ifxx Directives 1-39
1.4.33 .ifdef Directive 1-40
1.4.34 .ifndef Directive 1-42
1.4.35 .ifb Directive 1-43
1.4.36 .ifnb Directive 1-44
1.4.37 .ifidn Directive 1-45
1.4.38 .ifdif Directive 1-46
1.4.39 Alternate .if Directive Forms 1-47
1.4.40 Immediate Conditional Assembly Directives 1-48
1.4.41 .incbin Directive 1-49
1.4.42 .include Directive 1-50
1.4.42.1 Including Files In Windows/DOS 1-52
1.4.42.2 Including Files in Linux 1-53
1.4.43 .define and .undefine Directives 1-54
1.4.44 .enabl and .dsabl Directives 1-55
1.4.45 .setdp Directive 1-55
1.4.46 .16bit, .24bit, and .32bit Directives 1-57
1.4.47 .msb Directive 1-58
1.4.48 .lohi and .hilo Directives 1-59
1.4.49 .trace and .ntrace Directives 1-59
1.4.50 .end Directive 1-61
1.5 INVOKING ASXXXX 1-62
1.6 ERRORS 1-66
1.7 LISTING FILE 1-68
1.8 SYMBOL TABLE FILE 1-71
1.9 OBJECT FILE 1-71
1.10 HINT FILE 1-72
CHAPTER 2 THE MACRO PROCESSOR 2-1
2.1 DEFINING MACROS 2-1
2.1.1 .macro Directive 2-2
2.1.2 .endm Directive 2-3
2.1.3 .mexit Directive 2-3
2.2 CALLING MACROS 2-4
2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS 2-5
2.3.1 Macro Nesting 2-6
2.3.2 Special Characters in Macro Arguments 2-7
2.3.3 Passing Numerical Arguments as Symbols 2-8
2.3.4 Number of Arguments in Macro Calls 2-9
2.3.5 Creating Local Symbols Automatically 2-9
2.3.6 Keyword Arguments 2-10
2.3.7 Concatenation of Macro Arguments 2-12
2.4 MACRO ATTRIBUTE DIRECTIVES 2-13
2.4.1 .narg Directive 2-13
2.4.2 .nchr Directive 2-14
2.4.3 .ntyp Directive 2-15
2.4.4 .nval Directive 2-16
2.5 INDEFINITE REPEAT BLOCK DIRECTIVES 2-16
Page iii
2.5.1 .irp Directive 2-17
2.5.2 .irpc Directive 2-18
2.6 REPEAT BLOCK DIRECTIVE 2-19
2.6.1 .rept Directive 2-19
2.7 MACRO DELETION DIRECTIVE 2-20
2.7.1 .mdelete Directive 2-20
2.8 MACRO INVOCATION DETAILS 2-20
2.9 CONTROLLING MACRO LISTINGS 2-21
2.10 BUILDING A MACRO LIBRARY 2-22
2.10.1 .mlib Macro Directive 2-22
2.10.2 .mcall Macro Directive 2-23
2.11 EXAMPLE MACRO CROSS ASSEMBLERS 2-25
CHAPTER 3 THE LINKER 3-1
3.1 ASLINK RELOCATING LINKER 3-1
3.2 INVOKING ASLINK 3-3
3.3 LIBRARY PATH(S) AND FILE(S) 3-7
3.4 ASLINK PROCESSING 3-8
3.5 ASXXXX VERSION 5.XX (4.XX) LINKING 3-11
3.5.1 Object Module Format 3-11
3.5.2 Header Line 3-12
3.5.3 Module Line 3-12
3.5.4 Merge Mode Line 3-12
3.5.5 Bank Line 3-13
3.5.6 Area Line 3-13
3.5.7 Symbol Line 3-14
3.5.8 T Line 3-14
3.5.9 R Line 3-14
3.5.10 P Line 3-15
3.5.11 24-Bit and 32-Bit Addressing 3-16
3.5.12 ASlink V5.xx (V4.xx) Error Messages 3-16
3.6 ASXXXX VERSION 3.XX LINKING 3-19
3.6.1 Object Module Format 3-19
3.6.2 Header Line 3-20
3.6.3 Module Line 3-20
3.6.4 Area Line 3-20
3.6.5 Symbol Line 3-20
3.6.6 T Line 3-21
3.6.7 R Line 3-21
3.6.8 P Line 3-22
3.6.9 24-Bit and 32-Bit Addressing 3-22
3.6.10 ASlink V3.xx Error Messages 3-23
3.7 HINT FILE FORMAT FOR RELOCATED LISTINGS 3-25
3.8 INTEL HEX OUTPUT FORMAT 3-27
3.9 MOTOROLA S1-S9 OUTPUT FORMAT (16-BIT) 3-29
3.10 MOTOROLA S2-S8 OUTPUT FORMAT (24-BIT) 3-30
3.11 MOTOROLA S3-S7 OUTPUT FORMAT (32-BIT) 3-31
3.12 TANDY COLOR COMPUTER DISK BASIC FORMAT 3-32
Page iv
CHAPTER 4 BUILDING ASXXXX AND ASLINK 4-1
4.1 BUILDING ASXXXX AND ASLINK WITH LINUX 4-2
4.2 BUILDING ASXXXX AND ASLINK WITH CYGWIN 4-3
4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 4-3
4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S
TURBO C++ 3.0 4-4
4.4.1 Graphical User Interface 4-4
4.4.2 Command Line Interface 4-4
4.5 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL C++ 6.0 4-5
4.5.1 Graphical User Interface 4-5
4.5.2 Command Line Interface 4-5
4.6 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2005 4-6
4.6.1 Graphical User Interface 4-6
4.6.2 Command Line Interface 4-6
4.7 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2010 4-7
4.7.1 Graphical User Interface 4-7
4.7.2 Command Line Interface 4-8
4.8 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2013 4-9
4.8.1 Graphical User Interface 4-9
4.8.2 Command Line Interface 4-9
4.9 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2015 4-10
4.9.1 Graphical User Interface 4-10
4.9.2 Command Line Interface 4-10
4.10 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2019 4-11
4.10.1 Graphical User Interface 4-11
4.10.2 Command Line Interface 4-11
4.11 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2022 4-12
4.11.1 Graphical User Interface 4-12
4.11.2 Command Line Interface 4-12
4.12 BUILDING ASXXXX AND ASLINK WITH
OPEN WATCOM V1.9 4-13
4.12.1 Graphical User Interface 4-13
4.12.2 Command Line Interface 4-14
4.13 BUILDING ASXXXX AND ASLINK WITH
SYMANTEC C/C++ V7.2 4-15
4.13.1 Graphical User Interface 4-15
4.13.2 Command Line Interface 4-15
4.14 THE _CLEAN.BAT AND _PREP.BAT FILES 4-16
4.15 THE PRECOMPILED ASXXXX EXECUTABLES 4-16
APPENDIX A ASXSCN LISTING FILE SCANNER A-1
Page v
APPENDIX B ASXCNV LISTING CONVERTER B-1
APPENDIX C S19OS9 CONVERSION UTILITY C-1
APPENDIX D RELEASE NOTES D-1
APPENDIX E CONTRIBUTORS E-1
APPENDIX F NOTES AND TIPS F-1
---- Assembler Appendices ----
APPENDIX AA ASCHECK ASSEMBLER AA-1
APPENDIX AB AS1802 ASSEMBLER AB-1
APPENDIX AC AS2650 ASSEMBLER AC-1
APPENDIX AD AS4040 ASSEMBLER AD-1
APPENDIX AE AS430 ASSEMBLER AE-1
APPENDIX AF AS6100 ASSEMBLER AF-1
APPENDIX AG AS61860 ASSEMBLER AG-1
APPENDIX AH AS6500 ASSEMBLER AH-1
APPENDIX AI AS6800 ASSEMBLER AI-1
APPENDIX AJ AS6801 ASSEMBLER AJ-1
APPENDIX AK AS6804 ASSEMBLER AK-1
APPENDIX AL AS68(HC)05 ASSEMBLER AL-1
APPENDIX AM AS68(HC[S])08 ASSEMBLER AM-1
APPENDIX AN AS6809 ASSEMBLER AN-1
APPENDIX AO AS6811 ASSEMBLER AO-1
APPENDIX AP AS68(HC[S])12 ASSEMBLER AP-1
APPENDIX AQ AS6816 ASSEMBLER AQ-1
APPENDIX AR AS68CF ASSEMBLER AR-1
APPENDIX AS AS68K ASSEMBLER AS-1
APPENDIX AT AS740 ASSEMBLER AT-1
APPENDIX AU AS78K0 ASSEMBLER AU-1
APPENDIX AV AS78K0S ASSEMBLER AV-1
APPENDIX AW AS8008 ASSEMBLER AW-1
APPENDIX AX AS8008S ASSEMBLER AX-1
Page vii
APPENDIX AY AS8048 ASSEMBLER AY-1
APPENDIX AZ AS8051 ASSEMBLER AZ-1
APPENDIX BA AS8085 ASSEMBLER BA-1
APPENDIX BB AS89LP ASSEMBLER BB-1
APPENDIX BC AS8X300 ASSEMBLER BC-1
APPENDIX BD AS8XCXXX ASSEMBLER BD-1
APPENDIX BE ASAVR ASSEMBLER BE-1
APPENDIX BF ASCOP4 ASSEMBLER BF-1
APPENDIX BG ASCOP8 ASSEMBLER BG-1
APPENDIX BH ASEZ8 ASSEMBLER BH-1
APPENDIX BI ASEZ80 ASSEMBLER BI-1
APPENDIX BJ ASF2MC8 ASSEMBLER BJ-1
APPENDIX BK ASF8 ASSEMBLER BK-1
APPENDIX BL ASGB ASSEMBLER BL-1
APPENDIX BM ASH8 ASSEMBLER BM-1
APPENDIX BN ASM8C ASSEMBLER BN-1
APPENDIX BO ASPDP11 ASSEMBLER BO-1
APPENDIX BP ASPIC ASSEMBLER BP-1
APPENDIX BQ ASRAB ASSEMBLER BQ-1
APPENDIX BR ASRS08 ASSEMBLER BR-1
APPENDIX BS ASSCMP ASSEMBLER BS-1
APPENDIX BT ASST6 ASSEMBLER BT-1
APPENDIX BU ASST7 ASSEMBLER BU-1
APPENDIX BV ASST8 ASSEMBLER BV-1
Page viii
APPENDIX BW ASSX ASSEMBLER BW-1
APPENDIX BX ASZ8 ASSEMBLER BX-1
APPENDIX BY ASZ80 ASSEMBLER BY-1
APPENDIX BZ ASZ280 ASSEMBLER BZ-1
---- Link To The Assemblers Index ----
P R E F A C E
The ASxxxx assemblers were written following the style of
several unfinished cross assemblers found in the Digital Equip-
ment Corporation Users Society (DECUS) distribution of the C
programming language. The incomplete DECUS code was provided
with no documentation as to the input syntax or the output
format. I wish to thank the author for inspiring me to begin
the development of this set of assemblers.
The ASLINK program was written as a companion to the ASxxxx
assemblers, its design and implementation was not derived from
any other work.
I would greatly appreciate receiving the details of any
changes, additions, or errors pertaining to these programs and
will attempt to incorporate any fixes or generally useful
changes in a future update to these programs.
Alan R. Baldwin
Kent State University
Physics Department
Kent, Ohio 44242
U.S.A.
http://shop-pdp.net
baldwin@shop-pdp.net
baldwin@kent.edu
Page 2
E N D U S E R L I C E N S E A G R E E M E N T
Copyright (C) 1989-2023 Alan R. Baldwin
This program is free software: you can redistribute it
and/or modify it under the terms of the GNU General Public
License as published by the Free Software Foundation, either
version 3 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be use-
ful, but WITHOUT ANY WARRANTY; without even the implied war-
ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
You should have received a copy of the GNU General Public
License along with this program. If not, see
or ) will be
generated in the assembly listing if the first 79 characters in
two or more labels are the same. The code is caused by the
redeclaration of the symbol or its reference by another state-
ment. The code is generated because the symbols location is
changing on each pass through the source file.
The label must not start with the characters 0-9, as this
designates a reusable symbol with special attributes described
in a later section.
1.2.1.2 Operator Field -
The operator field specifies the action to be performed. It
may consist of an instruction mnemonic (op code) or an assembler
directive.
When the operator is an instruction mnemonic, a machine in-
struction is generated and the assembler evaluates the addresses
of the operands which follow. When the operator is a directive
ASxxxx performs certain control actions or processing operations
during assembly of the source program.
THE ASSEMBLER PAGE 1-6
SOURCE PROGRAM FORMAT
Leading and trailing spaces or tabs in the operator field
have no significance; such characters serve only to separate
the operator field from the preceding and following fields.
An operator is terminated by a space, tab or end of line.
1.2.1.3 Operand Field -
When the operator is an instruction mnemonic (op code), the
operand field contains program variables that are to be
evaluated/manipulated by the operator.
Operands may be expressions or symbols, depending on the
operator. Multiple expressions used in the operand fields may
be separated by a comma. An operand should be preceded by an
operator field; if it is not, the statement will give an error
( or ). All operands following instruction mnemonics are
treated as expressions.
The operand field is terminated by a semicolon when the field
is followed by a comment. For example, in the following
statement:
label: lda abcd,x ;Comment field
the tab between lda and abcd terminates the operator field and
defines the beginning of the operand field; a comma separates
the operands abcd and x; and a semicolon terminates the operand
field and defines the beginning of the comment field. When no
comment field follows, the operand field is terminated by the
end of the source line.
1.2.1.4 Comment Field -
The comment field begins with a semicolon and extends through
the end of the line. This field is optional and may contain any
7-bit ascii character except null.
Comments do not affect assembly processing or program execu-
tion.
THE ASSEMBLER PAGE 1-7
SYMBOLS AND EXPRESSIONS
1.3 SYMBOLS AND EXPRESSIONS
This section describes the generic components of the ASxxxx
assemblers: the character set, the conventions observed in con-
structing symbols, and the use of numbers, operators, and ex-
pressions.
1.3.1 Character Set
The following characters are legal in ASxxxx source programs:
1. The letters A through Z. Both upper- and lower-case
letters are acceptable. The assemblers, by default,
are case sensitive, i.e. ABCD and abcd are not the
same symbols. (The assemblers can be made case insen-
sitive by using the -z command line option.)
2. The digits 0 through 9
3. The characters . (period), $ (dollar sign), and _ (un-
derscore).
4. The special characters listed in Tables 1 through 6.
Tables 1 through 6 describe the various ASxxxx label and
field terminators, assignment operators, operand separators, as-
sembly, unary, binary, and radix operators.
THE ASSEMBLER PAGE 1-8
SYMBOLS AND EXPRESSIONS
Table 1 Label Terminators and Assignment Operators
----------------------------------------------------------------
: Colon Label terminator.
:: Double colon Label Terminator; defines the
label as a global label.
= Equal sign Direct assignment operator.
== Global equal Direct assignment operator; de-
fines the symbol as a global
symbol.
=: Local equal Direct assignment operator; de-
fines the symbol as a local sym-
bol.
----------------------------------------------------------------
Table 2 Field Terminators and Operand Separators
----------------------------------------------------------------
Tab Item or field terminator.
Space Item or field terminator.
, Comma Operand field separator.
; Semicolon Comment field indicator.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-9
SYMBOLS AND EXPRESSIONS
Table 3 Assembler Operators
----------------------------------------------------------------
# Number sign Immediate expression indicator.
. Period Current location counter.
( Left parenthesis Expression delimiter.
) Right parenthesis Expression delimiter.
----------------------------------------------------------------
Table 4 Unary Operators
----------------------------------------------------------------
< Left bracket Right bracket >FEDC Produces the upper byte
value of the expression.
(FE)
+ Plus sign +A Positive value of A
- Minus sign -A Produces the negative
(2's complement) of A.
~ Tilde ~A Produces the 1's comple-
ment of A.
' Single quote 'D Produces the value of
the character D.
" Double quote "AB Produces the double byte
value for AB.
\ Backslash '\n Unix style characters
\b, \f, \n, \r, \t
or '\001 or octal byte values.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-10
SYMBOLS AND EXPRESSIONS
Table 5 Binary Operators
----------------------------------------------------------------
<< Double 0800 << 4 Produces the 4 bit
Left bracket left-shifted value of
0800. (8000)
>> Double 0800 >> 4 Produces the 4 bit
Right bracket right-shifted value of
0800. (0080)
+ Plus sign A + B Arithmetic Addition
operator.
- Minus sign A - B Arithmetic Subtraction
operator.
* Asterisk A * B Arithmetic Multiplica-
tion operator.
/ Slash A / B Arithmetic Division
operator.
& Ampersand A & B Logical AND operator.
| Bar A | B Logical OR operator.
% Percent sign A % B Modulus operator.
^ Up arrow or A ^ B EXCLUSIVE OR operator.
circumflex
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-11
SYMBOLS AND EXPRESSIONS
Table 6 Temporary Radix Operators
----------------------------------------------------------------
$%, ^b, ^B, 0b, 0B Binary radix operator.
$&, ^o, ^O, 0o, 0O Octal radix operator.
^q, ^Q, 0q, 0Q
$#, ^d, ^D, 0d, 0D Decimal radix operator.
$@, ^x, ^X, 0x, 0X Hexadecimal radix operator.
^h, ^H, 0h, 0H
Potential ambiguities arising from the use of 0b and 0d
as temporary radix operators may be circumvented by pre-
ceding all non-prefixed hexadecimal numbers with 00.
Leading 0's are required in any case where the first
hexadecimal digit is abcdef as the assembler will treat
the letter sequence as a label.
The decimal point, '.', following any numerical se-
quence not preceded by a temporary radix and containing
only the decimal digits 0-9 will be treated as a
decimal, radix 10, value.
When the 'C Style Numbers' option is enabled
(see .enabl csn) all temporary radixs beginning with a 0
(zero), except 0x and 0X, are disabled. Number se-
quences beginning with 0x or 0X are interpreted as hex,
all other numbers beginning with 0 are octal, and numer-
ical sequences not beginning with a 0 are decimal.
----------------------------------------------------------------
1.3.2 User-Defined Symbols
User-defined symbols are those symbols that are equated to a
specific value through a direct assignment statement or appear
as labels. These symbols are added to the User Symbol Table as
they are encountered during assembly.
The following rules govern the creation of user-defined symbols:
THE ASSEMBLER PAGE 1-12
SYMBOLS AND EXPRESSIONS
1. Symbols can be composed of alphanumeric characters,
dollar signs ($), periods (.), and underscores (_)
only.
2. The first character of a symbol must not be a number
(except in the case of reusable symbols).
3. The first 79 characters of a symbol must be unique. A
symbol can be written with more than 79 legal
characters, but the 80th and subsequent characters are
ignored.
4. Spaces and Tabs must not be embedded within a symbol.
1.3.3 Reusable Symbols
Reusable symbols are specially formatted symbols used as la-
bels within a block of coding that has been delimited as a reus-
able symbol block. Reusable symbols are of the form n$, where n
is a decimal integer from 0 to 65535, inclusive. Examples of
reusable symbols are:
1$
27$
138$
244$
The range of a reusable symbol block consists of those state-
ments between two normally constructed symbolic labels. Note
that a statement of the form:
ALPHA = EXPRESSION
is a direct assignment statement but does not create a label and
thus does not delimit the range of a reusable symbol block.
Note that the range of a reusable symbol block may extend
across program areas.
Reusable symbols provide a convenient means of generating la-
bels for branch instructions and other such references within
reusable symbol blocks. Using reusable symbols reduces the pos-
sibility of symbols with multiple definitions appearing within a
user program. In addition, the use of reusable symbols dif-
ferentiates entry-point labels from other labels, since reusable
labels cannot be referenced from outside their respective symbol
THE ASSEMBLER PAGE 1-13
SYMBOLS AND EXPRESSIONS
blocks. Thus, reusable symbols of the same name can appear in
other symbol blocks without conflict. Reusable symbols require
less symbol table space than normal symbols. Their use is
recommended.
The use of the same reusable symbol within a symbol block
will generate one or both of the or errors.
Example of reusable symbols:
a: ldx #atable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
b: ldx #btable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
1.3.4 Current Location Counter
The period (.) is the symbol for the current location coun-
ter. When used in the operand field of an instruction, the
period represents the address of the first byte of the
instruction:
AS: ldx #. ;The period (.) refers to
;the address of the ldx
;instruction.
When used in the operand field of an ASxxxx directive, it
represents the address of the current byte or word:
QK = 0
.word 0xFFFE,.+4,QK ;The operand .+4 in the .word
;directive represents a value
;stored in the second of the
;three words during assembly.
If we assume the current value of the program counter is
0H0200, then during assembly, ASxxxx reserves three words of
storage starting at location 0H0200. The first value, a
hexadecimal constant FFFE, will be stored at location 0H0200.
THE ASSEMBLER PAGE 1-14
SYMBOLS AND EXPRESSIONS
The second value represented by .+4 will be stored at location
0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
value defined by the symbol QK will be placed at location
0H0204.
At the beginning of each assembly pass, ASxxxx resets the lo-
cation counter. Normally, consecutive memory locations are as-
signed to each byte of object code generated. However, the
value of the location counter can be changed through a direct
assignment statement of the following form:
. = . + expression
The new location counter can only be specified relative to
the current location counter. Neglecting to specify the current
program counter along with the expression on the right side of
the assignment operator will generate the <.> error. (Absolute
program areas may use the .org directive to specify the absolute
location of the current program counter.)
The following coding illustrates the use of the current location
counter:
.area CODE1 (ABS) ;program area CODE1
;is ABSOLUTE
.org 0H100 ;set location to
;0H100 absolute
num1: ldx #.+0H10 ;The label num1 has
;the value 0H100.
;X is loaded with
;0H100 + 0H10
.org 0H130 ;location counter
;set to 0H130
num2: ldy #. ;The label num2 has
;the value 0H130.
;Y is loaded with
;value 0H130.
.area CODE2 (REL) ;program area CODE2
;is RELOCATABLE
. = . + 0H20 ;Set location counter
;to relocatable 0H20 of
THE ASSEMBLER PAGE 1-15
SYMBOLS AND EXPRESSIONS
;the program section.
num3: .word 0 ;The label num3 has
;the value
;of relocatable 0H20.
. = . + 0H40 ;will reserve 0H40
;bytes of storage as will
.blkb 0H40 ;or
.blkw 0H20
The .blkb and .blkw directives are the preferred methods of
allocating space.
1.3.5 Numbers
ASxxxx assumes that all numbers in the source program are to
be interpreted in decimal radix unless otherwise specified. The
.radix directive may be used to specify the default as octal,
decimal, or hexadecimal. Individual numbers can be designated
as binary, octal, decimal, or hexadecimal through the temporary
radix prefixes shown in table 6.
Negative numbers must be preceded by a minus sign; ASxxxx
translates such numbers into two's complement form. Positive
numbers may (but need not) be preceded by a plus sign.
Numbers are always considered to be absolute values, therefor
they are never relocatable.
1.3.6 Terms
A term is a component of an expression and may be one of the
following:
1. A number.
2. A symbol:
1. A period (.) specified in an expression causes the
current location counter to be used.
2. A User-defined symbol.
3. An undefined symbol is assigned a value of zero and
inserted in the User-Defined symbol table as an
undefined symbol.
THE ASSEMBLER PAGE 1-16
SYMBOLS AND EXPRESSIONS
3. A single quote followed by a single ascii character, or
a double quote followed by two ascii characters.
4. An expression enclosed in parenthesis. Any expression
so enclosed is evaluated and reduced to a single term
before the remainder of the expression in which it ap-
pears is evaluated. Parenthesis, for example, may be
used to alter the left-to-right evaluation of expres-
sions, (as in A*B+C versus A*(B+C)), or to apply a un-
ary operator to an entire expression (as in -(A+B)).
5. A unary operator followed by a symbol or number.
1.3.7 Expressions
Expressions are combinations of terms joined together by
binary operators. Expressions reduce to a value. The evalua-
tion of an expression includes the determination of its attri-
butes. A resultant expression value may be one of three types
(as described later in this section): relocatable, absolute,
and external.
Expressions are evaluate with an operand hierarchy as follows:
* / % multiplication,
division, and
modulus first.
+ - addition and
subtraction second.
<< >> left shift and
right shift third.
^ exclusive or fourth.
& logical and fifth.
| logical or last
except that unary operators take precedence over binary
operators.
THE ASSEMBLER PAGE 1-17
SYMBOLS AND EXPRESSIONS
A missing or illegal operator terminates the expression
analysis, causing error codes and/or to be generated
depending upon the context of the expression itself.
At assembly time the value of an external (global) expression
is equal to the value of the absolute part of that expression.
For example, the expression external+4, where 'external' is an
external symbol, has the value of 4. This expression, however,
when evaluated at link time takes on the resolved value of the
symbol 'external', plus 4.
Expressions, when evaluated by ASxxxx, are one of three
types: relocatable, absolute, or external. The following dis-
tinctions are important:
1. An expression is relocatable if its value is fixed re-
lative to the base address of the program area in which
it appears; it will have an offset value added at link
time. Terms that contain labels defined in relocatable
program areas will have a relocatable value; simi-
larly, a period (.) in a relocatable program area,
representing the value of the current program location
counter, will also have a relocatable value.
2. An expression is absolute if its value is fixed. An
expression whose terms are numbers and ascii characters
will reduce to an absolute value. A relocatable ex-
pression or term minus a relocatable term, where both
elements being evaluated belong to the same program
area, is an absolute expression. This is because every
term in a program area has the same relocation bias.
When one term is subtracted from the other the reloca-
tion bias is zero.
3. An expression is external (or global) if it contains a
single global reference (plus or minus an absolute ex-
pression value) that is not defined within the current
program. Thus, an external expression is only par-
tially defined following assembly and must be resolved
at link time.
THE ASSEMBLER PAGE 1-18
GENERAL ASSEMBLER DIRECTIVES
1.4 GENERAL ASSEMBLER DIRECTIVES
An ASxxxx directive is placed in the operator field of the
source line. Only one directive is allowed per source line.
Each directive may have a blank operand field or one or more
operands. Legal operands differ with each directive.
1.4.1 .module Directive
Format:
.module name
The .module directive causes the name to be included in the
assemblers output file as an identifier for this particular ob-
ject module. The name may be from 1 to 79 characters in length.
The name may not have any embedded white space (spaces or tabs).
Only one identifier is allowed per assembled module. The main
use of this directive is to allow the linker to report a
modules' use of undefined symbols. At link time all undefined
symbols are reported and the modules referencing them are
listed.
1.4.2 .title Directive
Format:
.title string
The .title directive provides a character string to be placed
on the second line of each page during listing. The string be-
gins with the first non white space character (after any space
or tab) and ends with the end of the line.
THE ASSEMBLER PAGE 1-19
GENERAL ASSEMBLER DIRECTIVES
1.4.3 .sbttl Directive
Format:
.sbttl string
The .sbttl directive provides a character string to be placed
on the third line of each page during listing. The string be-
gins with the first non white space character (after any space
or tab) and ends with the end of the line.
1.4.4 .list and .nlist Directives
Format:
.list ;Basic .list
.list expr ;with expression
.list (arg1,arg2,...,argn) ;with sublist options
.nlist ;Basic .nlist
.nlist expr ;with expression
.nlist (arg1,arg2,...,argn) ;with sublist options
The .list and .nlist directives control the listing output to
the .lst file. The directives have the following sublist
options:
err - errors
loc - program location
bin - binary output
eqt - symbol or .if evaluation
cyc - opcode cycle count
lin - source line number
src - source line text
pag - pagination
lst - .list/.nlist line listing
md - macro definition listing
me - macro expansion listing
meb - macro expansion binary only listing
mel - macro expansion binary with source
! - sets the listing mode to
!(.list) or !(.nlist) before
applying the sublist options
THE ASSEMBLER PAGE 1-20
GENERAL ASSEMBLER DIRECTIVES
The 'normal' listing mode .list is the combination of err, loc,
bin, eqt, cyc, lin, src, pag, lst, and md enabled with me, meb,
and mel disabled. The 'normal' listing mode .nlist has all sub-
list items disabled. When specifying sublist options the option
list must be enclosed within parenthesis and multiple options
separated by commas.
The NOT option, !, is used to set the listing mode to the op-
posite of the .list or .nlist directive before applying the sub-
list options. For example:
.nlist (!) is equivalent to .list and
.list (!) is equivalent to .nlist
any additional options will
be applied normally
Normal .list/.nlist processing is disabled within false con-
ditional blocks. However, the .list/.nlist with an expression
can override this behavior if the expression has a non zero
value.
Examples of listing options:
.list (me) ; listing options are enabled
; during macro processing
.list (meb) ; macro processing lists only
; generated binary and location
.list (mel) ; macro processing lists only
; source lines generating
; binary output
.nlist (src) ; .nlist src lines not listed
.nlist (!,lst) ; list all except .nlist
.nlist ; combination lists only
.list (src) ; the source line
.list (!,src) ; list only the source line
.list 1 ; enable listing even within
; a FALSE conditional block
THE ASSEMBLER PAGE 1-21
GENERAL ASSEMBLER DIRECTIVES
1.4.5 .page Directive
Format:
.page
The .page directive causes a page ejection with a new heading
to be printed. The new page occurs after the next line of the
source program is processed, this allows an immediately follow-
ing .sbttl directive to appear on the new page. The .page
source line will not appear in the file listing. Paging may be
disabled by invoking the -p directive or by using the directive:
.nlist (pag)
If the .page directive is followed by a non zero constant or
an expression that evaluates to a non zero value then pagination
will be enabled within a false condition range to allow extended
textual information to be incorporated in the source program
with out the need to use the comment delimiter (;):
.if 0
.page 1 ;Enable pagination within 'if' block.
This text will be bypassed during assembly
but appear in the listing file.
.
.
.
.endif
1.4.6 .msg Directive
Format:
.msg /string/ or
.msg ^/string/
where: string represents a text string. The string is printed
to the console during the final assembly pass.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
THE ASSEMBLER PAGE 1-22
GENERAL ASSEMBLER DIRECTIVES
contained within the string itself. If the
delimiting characters do not match, the .msg
directive will give the error.
The .msg directive is useful to report assembly status or
other information during the assembly process.
1.4.7 .error Directive
Format:
.error exp
where: exp represents an absolute expression. If the
evaluation of the expression results in a non
zero value then an error is reported and the
text line is listed in the generated error.
The .error directive is useful to report configuration or
value errors during the assembly process. (The .error directive
is identical in function to the .assume directive, just perhaps
more descriptive.)
1.4.8 .byte, .db, and .fcb Directives
Format:
.byte exp ;Stores the binary value
.db exp ;of the expression in the
.fcb exp ;next byte.
.byte exp1,exp2,expn ;Stores the binary values
.db exp1,exp2,expn ;of the list of expressions
.fcb exp1,exp2,expn ;in successive bytes.
where: exp, represent expressions that will be
exp1, truncated to 8-bits of data.
. Each expression will be calculated,
. the high-order byte will be truncated.
. Multiple expressions must be
expn separated by commas.
The .byte, .db, or .fcb directives are used to generate suc-
cessive bytes of binary data in the object module.
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GENERAL ASSEMBLER DIRECTIVES
1.4.9 .word, .dw, and .fdb Directives
Format:
.word exp ;Stores the binary value
.dw exp ;of the expression in
.fdb exp ;the next word.
.word exp1,exp2,expn ;Stores the binary values
.dw exp1,exp2,expn ;of the list of expressions
.fdb exp1,exp2,expn ;in successive words.
where: exp, represent expressions that will occupy two
exp1, bytes of data. Each expression will be
. calculated as a 16-bit word expression.
. Multiple expressions must be
expn separated by commas.
The .word, .dw, or .fdb directives are used to generate suc-
cessive words of binary data in the object module.
1.4.10 .3byte and .triple Directives
Format:
.3byte exp ;Stores the binary value
.triple exp ;of the expression in
;the next triple (3 bytes).
.3byte exp1,exp2,expn ;Stores the binary values
.triple exp1,exp2,expn ;of the list of expressions
;in successive triples
;(3 bytes).
where: exp, represent expressions that will occupy three
exp1, bytes of data. Each expression will be
. calculated as a 24-bit word expression.
. Multiple expressions must be
expn separated by commas.
The .3byte or .triple directive is used to generate succes-
sive triples of binary data in the object module. (These direc-
tives are only available in assemblers supporting 24-bit
addressing.)
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GENERAL ASSEMBLER DIRECTIVES
1.4.11 .dl, .long, .4byte, and .quad Directives
Format:
.dl exp ;Stores the binary value
.long exp ;of the expression in
.4byte exp ;the next quad (4 bytes).
.quad exp
.dl exp1,exp2,expn ;Stores the binary values
.long exp1,exp2,expn ;of the list of expressions
.4byte exp1,exp2,expn ;in successive quads
.quad exp1,exp2,expn ;(4 bytes).
where: exp, represent expressions that will occupy three
exp1, bytes of data. Each expression will be
. calculated as a 32-bit word expression.
. Multiple expressions must be
expn separated by commas.
The .dl, .long, .4byte or .quad directive is used to generate
successive quads of binary data in the object module. (These
directives are only available in assemblers supporting 32-bit
addressing.)
1.4.12 .blkb, .ds, .rmb, and .rs Directives
Format:
.blkb N ;reserve N bytes of space
.ds N ;reserve N bytes of space
.rmb N ;reserve N bytes of space
.rs N ;reserve N bytes of space
The .blkb, .ds, .rmb, and .rs directives reserve byte blocks
in the object module;
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GENERAL ASSEMBLER DIRECTIVES
1.4.13 .blkw, .blkl, .blk3, and .blk4 Directives
Format:
.blkw N ;reserve N words of space
.blkl N ;reserve N quads of space
.blk3 N ;reserve N triples of space
.blk4 N ;reserve N quads of space
The .blkw directive reserves word blocks; the .blk3 reserves
3 byte blocks(available in assemblers supporting 24-bit
addressing); the .blkl and .blk4 reserves 4 byte blocks (avail-
able in assemblers supporting 32-bit addressing).
1.4.14 .ascii, .str, and .fcc Directives
Format:
.ascii /string/ or
.ascii ^/string/
.fcc /string/ or
.fcc ^/string/
.str /string/ or
.str ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .ascii
directive will give the error.
The .ascii, .fcc, and .str directives place one binary byte of
data for each character in the string into the object module.
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GENERAL ASSEMBLER DIRECTIVES
1.4.15 .ascis and .strs Directives
Format:
.ascis /string/ or
.ascis ^/string/
.strs /string/ or
.strs ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .ascis
and .strs directives will give the error.
The .ascis and .strs directives place one binary byte of data
for each character in the string into the object module. The
last character in the string will have the high order bit set.
1.4.16 .asciz and .strz Directives
Format:
.asciz /string/ or
.asciz ^/string/
.strz /string/ or
.strz ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .asciz
and .strz directive will give the error.
THE ASSEMBLER PAGE 1-27
GENERAL ASSEMBLER DIRECTIVES
The .asciz and .strz directives place one binary byte of data
for each character in the string into the object module. Fol-
lowing all the character data a zero byte is inserted to ter-
minate the character string.
1.4.17 Non-Printing Characters In Strings
Non-printing characters can be inserted into any string by
enclosing the non-printing characters' value in parenthesis as
shown in the following example.
.asciz /Hello World!/(13)(10)
A carriage return and line feed character have been appended to
the string "Hello World!". The non-printing character values
are always evaluated in the current radix (or in a temporary
radix when specified.) The character values may be evaluated
from any legal expression and are truncated to 8-bit values be-
fore being inserted into the character string.
It should be noted that multiple string segments and
non-printing character segments can be included in a single
string statemment:
.asciz /I Said:/(13)(10)/Hello World!/(13)(10)
1.4.18 .assume Directive
Format:
.assume exp
where: exp represents an absolute expression. If the
evaluation of the expression results in a non
zero value then an error is reported and the
text line is listed in the generated error.
The .assume directive is useful to check assumptions about
assembler values. (The .assume directive is identical in func-
tion to the .error directive, just perhaps more descriptive.)
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GENERAL ASSEMBLER DIRECTIVES
1.4.19 .radix Directive
Format:
.radix character
where: character represents a single character specifying the
default radix to be used for succeeding numbers. The
character may be any one of the following:
B,b Binary
O,o Octal
Q,q
D,d Decimal
'blank'
H,h Hexadecimal
X,x
1.4.20 .even Directive
Format:
.even
The .even directive ensures that the current location counter
contains an even boundary value by adding 1 if the current loca-
tion is odd.
1.4.21 .odd Directive
Format:
.odd
The .odd directive ensures that the current location counter
contains an odd boundary value by adding one if the current lo-
cation is even.
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GENERAL ASSEMBLER DIRECTIVES
1.4.22 .bndry Directive
Format:
.bndry n
If the current location is not an integer multiple of n then
the location counter is increased to the next integer multiple
of n.
As an example:
.bndry 4
changes the current location to be at a multiple of 4, a 4-byte
boundary.
The boundary specifications are propagated to the linker as a
boundary modulus, ie the smallest common boundary for all .odd,
.even, and .bndry directives contained within the area. A boun-
dary value of 1 is equivalent to .odd and a boundary value of 2
is equivalent to .even. Because areas are always assembled with
an initial address of 0, an even address, both .odd and .even
are modulus 2 boundaries.
As an example, suppose there are two sections: a CODE sec-
tion and a DATA section. The program code is written so that
the data associated with this section of the program code fol-
lows immediately.
.area CODE
; Subroutine 1 Code
; Uses data having a boundary of 6
.area DATA
; Subroutine 1 Data
.bndry 6
.word 1, 2, 3
...
.area CODE
; Subroutine 2 Code
; Uses data having a boundary of 8
.area DATA
; Subroutine 2 Data
.bndry 8
.word 1, 2, 3, 4,
THE ASSEMBLER PAGE 1-30
GENERAL ASSEMBLER DIRECTIVES
Since the CODE and DATA sections are assembled during a sin-
gle assembly (also applies to include files) the the assembler
compiles all CODE segments as a single area segment. The assem-
bler also compiles all the DATA segments as a single area seg-
ment which has two .bndry directives and will have a boundary
modulus of 24. 24 is the smallest boundary divisible by 6 and 8
with no remainder. When the assembled file is linked the loca-
tion of the data in the DATA area will be offset to an address
which has a boundary modulus of 24.
When multiple files containing the same area names (projects
with multiple independently compiled files or library files) are
linked together each area segment will be offset to match the
segments boundary modulus.
Boundary specifications will also be preserved when an area
base address is specified with the -a linker option and/or the
area is placed within a bank.
1.4.23 .area Directive
Format:
.area name [(options)]
where: name represents the symbolic name of the program sec-
tion. This name may be the same as any
user-defined symbol or bank as the area names
are independent of all symbols, labels, and
banks.
options specify the type of program or data area:
ABS absolute (automatically invokes OVR)
REL relocatable
OVR overlay
CON concatenate
NOPAG non-paged area
PAG paged area
options specify a code or data segment:
CSEG Code segment
DSEG Data segment
option specifies the data area bank:
BANK Named collection of areas
THE ASSEMBLER PAGE 1-31
GENERAL ASSEMBLER DIRECTIVES
The .area directive provides a means of defining and separat-
ing multiple programming and data sections. The name is the
area label used by the assembler and the linker to collect code
from various separately assembled modules into one section. The
name may be from 1 to 79 characters in length.
The options are specified within parenthesis and separated by
commas as shown in the following example:
.area TEST (REL,CON) ;This section is relocatable
;and concatenated with other
;sections of this program area.
.area DATA (REL,OVR) ;This section is relocatable
;and overlays other sections
;of this program area.
.area SYS (ABS,OVR) ;(CON not allowed with ABS)
;This section is defined as
;absolute. Absolute sections
;are always overlaid with
;other sections of this program
;area.
.area PAGE (PAG) ;This is a paged section. The
;section must be on a 256 byte
;boundary and its length is
;checked by the linker to be
;no larger than 256 bytes.
;This is useful for direct page
;areas.
The default area type is REL|CON; i.e. a relocatable sec-
tion which is concatenated with other sections of code with the
same area name. The ABS option indicates an absolute area. The
OVR and CON options indicate if program sections of the same
name will overlay each other (start at the same location) or be
concatenated with each other (appended to each other).
The area can be specified as either a code segment, CSEG, or
a data segment, DSEG. The CSEG and DSEG descriptors are useful
when the microprocessor code and data unit allocations are
unequal: e.g. the executable code uses an allocation of 2
bytes for each instruction and is addressed at an increment of 1
for every instruction, and the data uses an allocation of 1 byte
for each element and is addressed at an increment of 1 for each
data byte. The allocation units are defined by the architecture
of the particular microprocessor.
THE ASSEMBLER PAGE 1-32
GENERAL ASSEMBLER DIRECTIVES
The .area directive also provides a means of specifying the
bank this area is associated with. All areas associated with a
particular bank are combined at link time into a block of
code/data.
The CSEG, DSEG, and BANK options are specified within the
parenthesis as shown in the following examples:
.area C_SEG (CSEG,BANK=C1)
;This is a code section
;and is included in bank C1
.area D_SEG (DSEG,BANK=D1)
;This is a data section
;and is included in bank D1.
Multiple invocations of the .area directive with the same
name must specify the same options or leave the options field
blank, this defaults to the previously specified options for
this program area.
The ASxxxx assemblers automatically provide two program
sections:
'_CODE' This is the default code/data area.
This program area is of type
(REL,CON,CSEG).
'_DATA' This is the default optional data area.
This program area is of type
(REL,CON,DSEG).
The .area names and options are never case sensitive.
The linker -a option allows the repositioning of an area by
specifying its start address.
-a TEST=arg
Where TEST is the area name and arg is an expression that
evaluates to a start address.
THE ASSEMBLER PAGE 1-33
GENERAL ASSEMBLER DIRECTIVES
1.4.24 .psharea and .poparea Directives
Format:
.psharea
.poparea
The .psharea directive pushes the current area context onto a
16 element stack. Attempting a .psharea operation with a full
stack results in a stack overflow error message.
The .poparea directive pops an area context from the 16 ele-
ment stack. Attemptimg a .poparea operation form an empty stack
results in a stack underflow error message.
These directives can be useful when calling macros which
place code and/or data into other areas. As an example this
macro saves the current area context, places descriptors into a
specific area, and then restores the area context.
.macro .descriptor name, device, block, flags
.psharea
.area Descriptors
name: .rad50 device
.word block
.word flags
.poparea
.endm
Code or data added to an area whose context is in the psh/pop
stack is not affected by the restoration of the area's context.
The code or data pointer is not part of the stacked area's con-
text.
THE ASSEMBLER PAGE 1-34
GENERAL ASSEMBLER DIRECTIVES
1.4.25 .bank Directive
Format:
.bank name [(options)]
where: name represents the symbolic name of the bank sec-
tion. This name may be the same as any
user-defined symbol or area as the bank names
are independent of all symbols, labels, and
areas. The name may be from 1 to 79 characters
in length.
options specify the parameters of the bank:
BASE base address of bank
SIZE maximum size of bank
FSFX file suffix for this bank
MAP NOICE mapping
The .bank directive allows an arbitrary grouping of program
and/or data areas to be communicated to the linker. The bank
parameters are all optional and are described as follows:
1. BASE, the starting address of the bank (default is 0)
may be defined. This address can be overridden by us-
ing the linker -b option. The bank address is always
specified in 'byte' addressing. A first area which is
not 'byte' addressed (e.g. a processor addressed by a
'word' of 2 or more bytes) has the area address scaled
to begin at the 'byte' address.
2. SIZE, the maximum length of the bank specified in
bytes. The size is always specified in terms of bytes.
3. FSFX, the file suffix to be used by the linker for this
bank. The suffix may not contain embedded white space.
4. MAP, NOICE mapping parameter for this bank of
code/data.
The options are specified within parenthesis and separated by
commas as shown in the following example:
.BANK C1 (BASE=0x0100,SIZE=0x1000,FSFX=_C1)
;This bank starts at 0x0100,
;has a maximum size of 0x1000,
;and is to be placed into
THE ASSEMBLER PAGE 1-35
GENERAL ASSEMBLER DIRECTIVES
;a file with a suffix of _C1
The parameters must be absolute (external symbols are not al-
lowed.)
1.4.26 .org Directive
Format:
.org exp
where: exp is an absolute expression that becomes the cur-
rent location counter.
The .org directive is valid only in an absolute program section
and will give a error if used in a relocatable program area.
The .org directive specifies that the current location counter
is to become the specified absolute value.
1.4.27 .globl Directive
Format:
.globl sym1,sym2,...,symn
where: sym1, represent legal symbolic names.
sym2,... When multiple symbols are specified,
symn they are separated by commas.
A .globl directive may also have a label field and/or a com-
ment field.
The .globl directive is provided to export (and thus provide
linkage to) symbols not otherwise defined as global symbols
within a module. In exporting global symbols the directive
.globl J is similar to:
J == expression or J::
Because object modules are linked by global symbols, these
symbols are vital to a program. All internal symbols appearing
within a given program must be defined at the end of pass 1 or
they will be considered undefined. The assembly directive (-g)
can be invoked to make all undefined symbols global at the end
of pass 1.
THE ASSEMBLER PAGE 1-36
GENERAL ASSEMBLER DIRECTIVES
The .globl directive and == construct can be overridden by a
following .local directive.
NOTE
The ASxxxx assemblers use the last occurring symbol
specification in the source file(s) as the type shown
in the symbol table and output to the .rel file.
1.4.28 .local Directive
Format:
.local sym1,sym2,...,symn
where: sym1, represent legal symbolic names.
sym2,... When multiple symbols are specified,
symn they are separated by commas.
A .local directive may also have a label field and/or a com-
ment field.
The .local directive is provided to define symbols that are
local to the current assembly process. Local symbols are not
effected by the assembler option -a (make all symbols global).
In defining local symbols the directive .local J is similar to:
J =: expression
The .local directive and the =: construct are useful in de-
fining symbols and constants within a header or definition file
that contains many symbols specific to the current assembly pro-
cess that should not be exported into the .rel output file. A
typical usage is in the definition of SFRs (Special Function
Registers) for a microprocessor.
The .local directive and =: construct can be overridden by a
following .globl directive.
NOTE
The ASxxxx assemblers use the last occurring symbol
specification in the source file(s) as the type shown
in the symbol table and output to the .rel file.
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GENERAL ASSEMBLER DIRECTIVES
1.4.29 .equ, .gblequ, and .lclequ Directives
Format:
sym1 .equ expr ; equivalent to sym1 = expr
sym2 .gblequ expr ; equivalent to sym2 == expr
sym3 .lclequ expr ; equivalent to sym3 =: expr
or
.equ sym1, expr ; equivalent to sym1 = expr
.gblequ sym2, expr ; equivalent to sym2 == expr
.lclequ sym3, expr ; equivalent to sym3 =: expr
These alternate forms of equivalence are provided for user
convenience.
1.4.30 .if, .else, and .endif Directives
Format:
.if expr
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the expres-
sion 'expr' is not zero (i.e. true) and the range of false con-
dition will be processed if the expression 'expr' is zero (i.e
false). The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .if/.else/.endif constructions:
.if A-4 ;evaluate A-4
.byte 1,2 ;insert bytes if A-4 is
.endif ;not zero
.if K+3 ;evaluate K+3
.else
THE ASSEMBLER PAGE 1-38
GENERAL ASSEMBLER DIRECTIVES
.byte 3,4 ;insert bytes if K+3
.endif ;is zero
.if J&3 ;evaluate J masked by 3
.byte 12 ;insert this byte if J&3
.else ;is not zero
.byte 13 ;insert this byte if J&3
.endif ;is zero
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.31 .iff, .ift, and .iftf Directives
Format:
.if expr ;'if' range Condition is
;TRUE when expr is not zero
.ift ;}
. ;} range of true condition ;}
.iff ;} if
. ;} range of false condition ;} block
.iftf ;}
. ;} unconditional range ;}
.else ;'else' range Condition is
;TRUE when expr is zero
.ift ;}
. ;} range of true condition ;}
.iff ;} else
. ;} range of false condition ;} block
.iftf ;}
. ;} unconditional range ;}
.endif
The subconditional assembly directives may be placed within
conditional assembly blocks to indicate:
1. The assembly of an alternate body of code when
the condition of the block tests false.
2. The assembly of non-contiguous body of code
within the conditional assembly block,
depending upon the result of the conditional
THE ASSEMBLER PAGE 1-39
GENERAL ASSEMBLER DIRECTIVES
test in entering the block.
3. The unconditional assembly of a body of code
within a conditional assembly block.
The use of the .iff, .ift, and .iftf directives makes the use of
the .else directive redundant.
Note that the implementation of the .else directive causes
the .if tested condition to be complemented. The TRUE and FALSE
conditions are determined by the .if/.else conditional state.
All .if/.else/.endif directives are limited to a maximum
nesting of 10 levels.
The use of the .iff, .ift, or .iftf directives outside of a
conditional block results in a error code.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.32 .ifxx Directives
Additional conditional directives are available to test the
value of an evaluated expression:
.ifne expr ; true if expr != 0
.ifeq expr ; true if expr == 0
.ifgt expr ; true if expr > 0
.iflt expr ; true if expr < 0
.ifge expr ; true if expr >= 0
.ifle expr ; true if expr <= 0
Format:
.ifxx expr
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
THE ASSEMBLER PAGE 1-40
GENERAL ASSEMBLER DIRECTIVES
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the expres-
sion 'expr' is not zero (i.e. true) and the range of false con-
dition will be processed if the expression 'expr' is zero (i.e
false). The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .ifxx/.else/.endif constructions:
.ifne A-4 ;evaluate A-4
.byte 1,2 ;insert bytes if A-4 is
.endif ;not zero
.ifeq K+3 ;evaluate K+3
.byte 3,4 ;insert bytes if K+3
.endif ;is zero
.ifne J&3 ;evaluate J masked by 3
.byte 12 ;insert this byte if J&3
.else ;is not zero
.byte 13 ;insert this byte if J&3
.endif ;is zero
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.33 .ifdef Directive
Format:
.ifdef sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
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GENERAL ASSEMBLER DIRECTIVES
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the symbol
'sym' has been defined with a .define directive or 'sym' is a
variable with an assigned value else the false range will be
processed. The range of true condition is optional as is the
.else directive and the range of false condition. The following
are all valid .ifdef/.else/.endif constructions:
.ifdef sym$1 ;lookup symbol sym$1
.byte 1,2 ;insert bytes if sym$1
.endif ;is defined or
;assigned a value
.ifdef sym$2 ;lookup symbol sym$2
.else
.byte 3,4 ;insert bytes if sym$1
.endif ;is not defined and
;not assigned a value
.ifdef sym$3 ;lookup symbol sym$3
.byte 12 ;insert this byte if sym$3
.else ;is defined/valued
.byte 13 ;insert this byte if sym$3
.endif ;is not defined/valued
Note that the default assembler configuration of case sensitive
means the testing for a defined symbol is also case sensitive.
All .if/.else/.endif directives are limited to a maximum
nesting of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
THE ASSEMBLER PAGE 1-42
GENERAL ASSEMBLER DIRECTIVES
1.4.34 .ifndef Directive
Format:
.ifndef sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the condition test.
The range of true condition will be processed if the symbol
'sym' is not defined by a .define directive and a variable 'sym'
has not been assigned a value else the range of false condition
will be processed. The range of true condition is optional as
is the .else directive and the range of false condition. The
following are all valid .ifndef/.else/.endif constructions:
.ifndef sym$1 ;lookup symbol sym$1
.byte 1,2 ;insert bytes if sym$1 is
.endif ;not defined and
;not assigned a value
.ifndef sym$2 ;lookup symbol sym$2
.else
.byte 3,4 ;insert bytes if sym$1
.endif ;is defined or
;is assigned a value
.ifndef sym$3 ;lookup symbol sym$3
.byte 12 ;insert this byte if sym$3
.else ;is not defined/valued
.byte 13 ;insert this byte if sym$3
.endif ;is defined/valued
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
THE ASSEMBLER PAGE 1-43
GENERAL ASSEMBLER DIRECTIVES
1.4.35 .ifb Directive
Format:
.ifb sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifb is most useful when used in macro de-
finitions to determine if the argument is blank. The range of
true condition will be processed if the symbol 'sym' is blank.
The range of true condition is optional as is the .else direc-
tive and the range of false condition. The following are all
valid .ifb/.else/.endif constructions:
.ifb sym$1 ;argument is not blank
.byte 1,2 ;insert bytes if argument
.endif ;is blank
.ifb sym$2 ;argument is not blank
.else
.byte 3,4 ;insert bytes if argument
.endif ;is not blank
.ifb ;argument is blank
.byte 12 ;insert this byte if
.else ;argument is blank
.byte 13 ;insert this byte if
.endif ;argument not blank
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
THE ASSEMBLER PAGE 1-44
GENERAL ASSEMBLER DIRECTIVES
1.4.36 .ifnb Directive
Format:
.ifnb sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifnb is most useful when used in macro de-
finitions to determine if the argument is not blank. The range
of true condition will be processed if the symbol 'sym' is not
blank. The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .ifnb/.else/.endif constructions:
.ifnb sym$1 ;argument is not blank
.byte 1,2 ;insert bytes if argument
.endif ;is not blank
.ifnb sym$2 ;argument is not blank
.else
.byte 3,4 ;insert bytes if argument
.endif ;is blank
.ifnb ;argument is blank
.byte 12 ;insert this byte if
.else ;argument is not blank
.byte 13 ;insert this byte if
.endif ;argument is blank
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
THE ASSEMBLER PAGE 1-45
GENERAL ASSEMBLER DIRECTIVES
1.4.37 .ifidn Directive
Format:
.ifidn sym$1,sym$2
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifidn is most useful when used in macro de-
finitions to determine if the arguments are identical. The
range of true condition will be processed if the symbol 'sym$1'
is identical to 'sym$2' (i.e. the character strings for sym$1
and sym$2 are the same consistent with the case sensitivity
flag). When this if statement occurs inside a macro where an
argument substitution may be blank then an argument should be
delimited with the form /symbol/ for each symbol. The range of
true condition is optional as is the .else directive and the
range of false condition. The following are all valid
.ifidn/.else/.endif constructions:
.ifidn sym$1,sym$1 ;arguments are the same
.byte 1,2 ;insert bytes if arguments
.endif ;are the sane
.ifidn sym$1,sym$2 ;arguments are not the same
.else
.byte 3,4 ;insert bytes if arguments
.endif ;are not the same
.ifidn sym$3,sym$3 ;arguments are the same
.byte 12 ;insert this byte if
.else ;arguments are the same
.byte 13 ;insert this byte if
.endif ;arguments are not the same
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
THE ASSEMBLER PAGE 1-46
GENERAL ASSEMBLER DIRECTIVES
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.38 .ifdif Directive
Format:
.ifdif sym$1,sym$2
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifdif is most useful when used in macro de-
finitions to determine if the arguments are different. The
range of true condition will be processed if the symbol 'sym$1'
is different from 'sym$2' (i.e. the character strings for sym$1
and sym$2 are the not the same consistent with the case sensi-
tivity flag). When this if statement occurs inside a macro
where an argument substitution may be blank then an argument
should be delimited with the form /symbol/ for each symbol. The
range of true condition is optional as is the .else directive
and the range of false condition. The following are all valid
.ifdif/.else/.endif constructions:
.ifdif sym$1,sym$2 ;arguments are different
.byte 1,2 ;insert bytes if arguments
.endif ;are different
.ifdif sym$1,sym$1 ;arguments are identical
.else
.byte 3,4 ;insert bytes if arguments
.endif ;are different
.ifdif sym$1,sym$3 ;arguments are different
.byte 12 ;insert this byte if
.else ;arguments are different
.byte 13 ;insert this byte if
.endif ;arguments are identical
THE ASSEMBLER PAGE 1-47
GENERAL ASSEMBLER DIRECTIVES
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.39 Alternate .if Directive Forms
Format:
.if cnd(,) arg1(, arg2)
where the cnd (followed by an optional comma) may be any of
the following:
-------------------------------------------------------
condition Assemble
(complement) Args Block if:
-------------------------------------------------------
eq ( ne ) expr equal to zero
(not equal to zero)
gt ( le ) expr greater than zero
(less than or equal to zero)
lt ( ge ) expr less than zero
(greater than or equal to zero)
def ( ndef ) symbol .define'd or user set
(not .define'd or user set)
b ( nb ) macro argument present
symbol (argument not present)
idn ( dif ) macro arguments identical
symbol (arguments not identical)
f ( t ) ----- only within a .if/.else/.endif
conditional block
tf ----- only within a .if/.else/.endif
conditional block
THE ASSEMBLER PAGE 1-48
GENERAL ASSEMBLER DIRECTIVES
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an error. Assemblies having unequal .if and .endif
counts will cause an error.
1.4.40 Immediate Conditional Assembly Directives
The immediate conditional assembly directives allow a single
line of code to be assembled without using a .if/.else/.endif
construct. All of the previously described conditionals have
immediate equivalents.
Format:
.iif arg(,) line_to_assemble
.iifeq arg(,) line_to_assemble
.iifne arg(,) line_to_assemble
.iifgt arg(,) line_to_assemble
.iifle arg(,) line_to_assemble
.iifge arg(,) line_to_assemble
.iiflt arg(,) line_to_assemble
.iifdef arg(,) line_to_assemble
.iifndef arg(,) line_to_assemble
.iifb (,)arg(,) line_to_assemble
.iifnb (,)arg(,) line_to_assemble
.iifidn (,)arg1,arg2(,) line_to_assemble
.iifdif (,)arg1,arg2(,) line_to_assemble
Valid only within a conditional block:
.iiff line_to_assemble
.iift line_to_assemble
.iiftf line_to_assemble
Alternate Format:
.iif arg(,) line_to_assemble
.iif eq arg(,) line_to_assemble
.iif ne arg(,) line_to_assemble
.iif gt arg(,) line_to_assemble
.iif le arg(,) line_to_assemble
.iif ge arg(,) line_to_assemble
.iif lt arg(,) line_to_assemble
THE ASSEMBLER PAGE 1-49
GENERAL ASSEMBLER DIRECTIVES
.iif def arg(,) line_to_assemble
.iif ndef arg(,) line_to_assemble
.iif b (,)arg(,) line_to_assemble
.iif nb (,)arg(,) line_to_assemble
.iif idn (,)arg1,arg2(,) line_to_assemble
.iif dif (,)arg1,arg2(,) line_to_assemble
Valid only within a conditional block:
.iif f line_to_assemble
.iif t line_to_assemble
.iif tf line_to_assemble
The (,) indicates an optional comma.
The .iif types b, n, idn, and dif require the commas if the
argument(s) may be blank. These commas may be removed if the
arguments are delimited with the form ^/symbol/ for each symbol.
The immediate conditional directives do not change the
.if/.else/.endif nesting level.
1.4.41 .incbin Directive
Format:
.incbin /string/ [,offset [,count]] or
.incbin ^/string/ [,offset [,count]]
where: string represents a string that is the file specifica-
tion of any file type.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .incbin
directive will give the error.
The .incbin directive is used to insert the contents of a
file verbatim into the assembler as a byte stream. This can be
handy (for example) when including some arbitrary data directly
into the executable output. However, it is recommended to use
this only for small pieces of data.
THE ASSEMBLER PAGE 1-50
GENERAL ASSEMBLER DIRECTIVES
The .incbin can be invoked with one or two optional arguments
which specify the number of bytes to skip in the file and the
maximum number of bytes to insert into the output file.
.incbin "file.dat" ; include the whole file
.incbin "file.dat",1024 ; skip the first 1024 bytes
.incbin "file.dat",1024,512 ; skip first 1024, and
; include at most 512 bytes
The ',' delimiters can be any regular delimiter - space, tab, or
','. The offset and count arguments must be local, evaluate to
a constant, and may be 0. A blank offset is by default 0 and a
blank count is the remainder of the file.
An offset equal to or greater than the file length results in
an error. A count that is larger than the remaining bytes
in a file does not result in an error.
1.4.42 .include Directive
Format:
.include /string/ or
.include ^/string/
where: string represents a string that is the file specifica-
tion of an ASxxxx source file.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .include
directive will give the error.
The .include directive is used to insert a source file within
the source file currently being assembled. When this directive
is encountered, an implicit .page directive is issued. When the
end of the specified source file is reached, an implicit .page
directive is issued and input continues from the previous source
file. The maximum nesting level of source files specified by a
.include directive is five.
The total number of separately specified .include files is
unlimited as each .include file is opened and then closed during
each pass made by the assembler.
THE ASSEMBLER PAGE 1-51
GENERAL ASSEMBLER DIRECTIVES
The default directory path, if none is specified, for any
.include file is the directory path of the current file. For
example: if the current source file, D:\proj\file1.asm, in-
cludes a file specified as "include1" then the file
D:\proj\include1.asm is opened.
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GENERAL ASSEMBLER DIRECTIVES
1.4.42.1 Including Files In Windows/DOS -
Graphical Illustration of Include File Locations
for the following command line entry:
__> bin\ascheck -l -o -s obj\prjct.rel src\prjct\prjct.asm
/-----------------------------------------------------------------------\
| (rooted) |
_____ | _____ |
| | | | | |
---| inc | <---/ ---| bin | |
| |_____| | |_____| |
| | | | |
| \___ inc4.asm | \___ ascheck.exe |
| | |
| | |
_____ | _____ _____ | _____ _____ |
| | | | | | | | | | | | (in prjct.asm directory) |
| C:\ |-----| ..\ |-----| __> |--+--| src |-----|prjct| <-------------------------------\ |
|_____| |_____| | |_____| | |_____| | |_____| | |
| | | | .include "inc1.asm" -/ |
| ^ | | \___ prjct.asm .include "C:\inc\inc4.asm" --/
| | | | \___ inc1.asm .include "..\inc\inc3.asm" -------\
Current | | | | _____ .include "src\inc\inc2.asm" -\ |
Working ------> | >---/ | | | | | |
Directory | | ---| inc | <---------------------------------------/ |
| | |_____| (relative to current working directory) |
| | | |
| | \___ inc2.asm |
| | _____ |
| | | | |
| ---| obj | |
| |_____| |
| | |
| \___ .REL, .SYM, .LST, .HLR |
| |
| _____ |
| | | (relative to current working directory) |
---| inc | <--------------------------------------------------------------------/
|_____|
|
\___ inc3.asm
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GENERAL ASSEMBLER DIRECTIVES
1.4.42.2 Including Files in Linux -
Graphical Illustration of Include File Locations
for the following command line entry:
__$ bin/ascheck -l -o -s obj/prjct.rel src/prjct/prjct.asm
/-----------------------------------------------------------------------\
| (rooted) |
_____ | _____ |
| | | | | |
---| inc | <---/ ---| bin | |
| |_____| | |_____| |
| | | | |
| \___ inc4.asm | \___ ascheck |
| | |
| | |
_____ | _____ _____ | _____ _____ |
| | | | | | | | | | | | (in prjct.asm directory) |
| / |-----| ../ |-----| __$ |--+--| src |-----|prjct| <-------------------------------\ |
|_____| |_____| | |_____| | |_____| | |_____| | |
| | | | .include "inc1.asm" -/ |
| ^ | | \___ prjct.asm .include "/inc/inc4.asm" ----/
| | | | \___ inc1.asm .include "../inc/inc3.asm" -------\
Current | | | | _____ .include "src/inc/inc2.asm" -\ |
Working ------> | >---/ | | | | | |
Directory | | ---| inc | <---------------------------------------/ |
| | |_____| (relative to current working directory) |
| | | |
| | \___ inc2.asm |
| | _____ |
| | | | |
| ---| obj | |
| |_____| |
| | |
| \___ .REL, .SYM, .LST, .HLR |
| |
| _____ |
| | | (relative to current working directory) |
---| inc | <--------------------------------------------------------------------/
|_____|
|
\___ inc3.asm
THE ASSEMBLER PAGE 1-54
GENERAL ASSEMBLER DIRECTIVES
1.4.43 .define and .undefine Directives
Format:
.define keyword /string/ or
.define keyword ^/string/
.undefine keyword
where: keyword is the substitutable string which must start
with a letter and may contain any combination of
digits and letters.
where: string represents a string that is substituted for the
keyword. The string may contain any sequence of
characters including white space.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .define
directive will give the error.
The .define directive specifies a user defined string which
is substituted for the keyword. The substitution string may it-
self contain other keywords that are substitutable. The assem-
bler resumes the parse of the line at the point the keyword was
found. Care must be excersized to avoid any circular references
within .define directives, otherwise the assembler may enter a
'recursion runaway' resulting in an error.
The .undefine directive removes the keyword as a substitut-
able string. No error is returned if the keyword was not de-
fined.
When a .define directive specifies a keyword, with or without
a substitution string, the keyword is defined but is not a sym-
bol. Because the keyword is not a symbol the keyword becomes
undefined at the beginning of the next assembler pass.
The keyword substitution is never applied to these
directives: .define, .undefine, .ifdef .ifndef, iifdef,
iifndef, or any variation of def or ndef conditionals.
THE ASSEMBLER PAGE 1-55
GENERAL ASSEMBLER DIRECTIVES
1.4.44 .enabl and .dsabl Directives
Format:
.enabl (optn1, optn2, ...) ;enable options
.dsabl (optn1, optn2, ...) ;disable options
The 'csn' option , C Style Numbers', is currently the only
option available to all ASxxxx assemblers. Enabling the 'csn'
option disables all the temporary radix options beginning with a
0 (zero) except the hex radix options 0x and 0X. All other
numbers beginning with 0 are evaluated as octal values and all
numbers beginning with digits 1-9 are evaluated as decimal
values.
Individual assemblers may have additional options specific to
that assembler and will be described in its documentation.
1.4.45 .setdp Directive
Format:
.setdp [base [,area]]
The set direct page directive has a common format in all the as-
semblers supporting a paged mode. The .setdp directive is used
to inform the assembler of the current direct page region and
the offset address within the selected area. The normal invoca-
tion methods are:
.area DIRECT (PAG)
.setdp
or
.setdp 0,DIRECT
for all the 68xx microprocessors (the 6804 has only the paged
ram area). The commands specify that the direct page is in area
DIRECT and its offset address is 0 (the only valid value for all
but the 6809 microprocessor). Be sure to place the DIRECT area
at address 0 during linking. When the base address and area are
not specified, then zero and the current area are the defaults.
If a .setdp directive is not issued the assembler defaults the
direct page to the area "_CODE" at offset 0.
THE ASSEMBLER PAGE 1-56
GENERAL ASSEMBLER DIRECTIVES
The assembler verifies that any local variable used in a
direct variable reference is located in this area. Local vari-
able and constant value direct access addresses are checked to
be within the address range from 0 to 255.
External direct references are assumed by the assembler to be
in the correct area and have valid offsets. The linker will
check all direct page relocations to verify that they are within
the correct area.
The 6809 microprocessor allows the selection of the direct
page to be on any 256 byte boundary by loading the appropriate
value into the dp register. Typically one would like to select
the page boundary at link time, one method follows:
.area DIRECT (PAG) ; define the direct page
.setdp
.
.
.
.area PROGRAM
.
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
At link time specify the base and global equates to locate the
direct page:
-a DIRECT=0x1000
-g DIRECT=0x1000
Both the area address and offset value must be specified (area
and variable names are independent). The linker will verify
that the relocated direct page accesses are within the direct
page.
THE ASSEMBLER PAGE 1-57
GENERAL ASSEMBLER DIRECTIVES
The preceding sequence could be repeated for multiple paged
areas, however an alternate method is to define a non-paged area
and use the .setdp directive to specify the offset value:
.area DIRECT ; define non-paged area
.
.
.
.area PROGRAM
.
.setdp 0,DIRECT ; direct page area
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
.
.
.setdp 0x100,DIRECT ; direct page area
ldd #DIRECT+0x100 ; load the direct page register
tfr a,dp ; for access to the direct page
The linker will verify that subsequent direct page references
are in the specified area and offset address range. It is the
programmers responsibility to load the dp register with the cor-
rect page segment corresponding to the .setdp base address
specified.
For those cases where a single piece of code must access a
defined data structure within a direct page and there are many
pages, define a dummy direct page linked at address 0. This
dummy page is used only to define the variable labels. Then
load the dp register with the real base address but do not use a
.setdp directive. This method is equivalent to indexed address-
ing, where the dp register is the index register and the direct
addressing is the offset.
1.4.46 .16bit, .24bit, and .32bit Directives
Format:
.16bit ;specify 16-bit addressing
.24bit ;specify 24-bit addressing
.32bit ;specify 32-bit addressing
The .16bit, .24bit, and .32bit directives are special direc-
tives for assembler configuration when default values are not
used.
THE ASSEMBLER PAGE 1-58
GENERAL ASSEMBLER DIRECTIVES
1.4.47 .msb Directive
Format:
.msb n
The .msb directive is only available in selected assemblers
which support 24 or 32-bit addressing.
The assembler operator '>' selects the upper byte (MSB) when
included in an assembler instruction. The default assembler
mode is to select bits <15:8> as the MSB. The .msb directive
allows the programmer to specify a particular byte as the 'MSB'
when the address space is larger than 16-bits.
The assembler directive .msb n configures the assembler to
select a particular byte as MSB. Given a 32-bit address of MNmn
(M(3) is <31:24>, N(2) is <23:16>, m(1) is <15:8>, and n(0) is
<7:0>) the following examples show how to select a particular
address byte:
.msb 1 ;select byte 1 of address
;
LD A,>MNmn ;byte m <15:8> ==>> A
...
.msb 2 ;select byte 2 of address
;
LD A,>MNmn ;byte N <23:16> ==>> A
...
.msb 3 ;select byte 3 of address
;
LD A,>MNmn ;byte M <31:24> ==>> A
...
THE ASSEMBLER PAGE 1-59
GENERAL ASSEMBLER DIRECTIVES
1.4.48 .lohi and .hilo Directives
Format:
.lohi ;specify LSB first output
.hilo ;specify MSB first output
The .lohi and .hilo directives are special directives for as-
sembler output configuration. These directives are currently
only enabled in assembler 'ascheck'.
An error will be generated if the .lohi and .hilo direc-
tives are both used within the same assembly source file.
1.4.49 .trace and .ntrace Directives
Format:
.trace ;Basic .trace
.trace (arg1,arg2,...,argn) ;with trace options
.ntrace ;Basic .ntrace
.ntrace (arg1,arg2,...,argn) ;with trace options
The .trace and .ntrace directives are used to trace the process
of inserting assembler text lines, opening and closing of assem-
bler and include files, and the processing of macros. The
directives have the following tracing options:
ins - line insertion
asm - assembler files
inc - include files
mcr - macro invocation
rpt - macro repeat invocation
! - sets the tracing mode to
!(.trace) or !(.ntrace) before
applying the tracing options
The 'normal' tracing mode .trace is the combination of ins, asm,
inc, mcr and rpt enabled. The 'normal' non tracing mode .ntrace
has all tracing items disabled. When specifying tracing options
the option list must be enclosed within parenthesis and multiple
options separated by commas.
THE ASSEMBLER PAGE 1-60
GENERAL ASSEMBLER DIRECTIVES
The NOT option, !, is used to set the tracing mode to the op-
posite of the .trace or .ntrace directive before applying the
tracing options.
For example:
.ntrace (!) is equivalent to .trace and
.trace (!) is equivalent to .ntrace
any additional options will
be applied normally
When tracing is invoked each trace option inserts a comment
line into the assembler listing denoting when a particular
traced action occurs. The inserted lines contain information
related to the type of traced action:
ins at insertion ;N>>
asm at entry ;A>> file.ext
at exit ;A<< file.ext
The name of the assembler file
inc at entry ;I>> (N) file.ext
at exit ;I<< (N) file.ext
The inclusion depth (N) and
the name of the include file
mcr at entry ;M>> (N) file.ext (L)
at exit ;M<< (N) file.ext (L)
The macro recursion level,
the name of the file defining the macro,
and the line number in file.ext
rpt at invocation ;R>> (N) file.ext (L)
The macro repeat count,
the name of the file defining the macro,
and the line number in file.ext
The initial invocation of a macro or any repeat macro will be
listed as ;M>> and subsequent repeats will be listed as ;R>>.
Thus the first ;R>> will be the second invocation of the repeat
macro.
Examples of tracing options:
.trace (mcr) ; macro processing lists
; the entry and exit from
THE ASSEMBLER PAGE 1-61
GENERAL ASSEMBLER DIRECTIVES
; a non repeating macro.
.trace (rpt) ; macro processing lists
; the entry, exit, and
; repeat of a macro.
1.4.50 .end Directive
Format:
.end
.end exp
where: exp represents any expression, including constants,
symbols, or labels.
The .end directive is used to specify a code entry point to
be included in the linker output file. Review the I86 and S
record formats described in the linker section for details.
The .end directive without an expression is ignored.
THE ASSEMBLER PAGE 1-62
GENERAL ASSEMBLER DIRECTIVES
1.5 INVOKING ASXXXX
Starting an ASxxxx assembler without any arguments provides
the following option list and then exits:
Usage: [-Options] [-Option with arg] file1 [file2 ...]
-h or NO ARGUMENTS Show this help list
Output:
-o Enable object output (-o+ change file1[.rel])
-o+ Conditional Options -o+[ ][name][.ext]
'-o+.ext' (or) '-o+ .ext' -> file1.ext
'-o+name' (or) '-o+ name' -> name[.rel]
'-o+name.ext' (or) '-o+ name.ext' -> name.ext
-l Create list file1[.lst] (file1 <- name)
-s Create symbol file1[.sym] (file1 <- name)
Listing:
-d Decimal listing
-q Octal listing
-x Hex listing (default)
-b Display .define substitutions in listing
-bb and display without .define substitutions
-c Disable instruction cycle count in listing
-f Flag relocatable references by ` in listing file
-ff Flag relocatable references by mode in listing file
-k Disable error messages to listing file
-p Disable automatic listing pagination
-u Disable .list/.nlist processing
-w Wide listing format for symbol table
Assembly:
-i Insert assembler line before input file(s)
-v Enable out of range signed / unsigned errors
-n# Set the maximum number of 'Pass 2' scans
Symbols:
-a All user symbols made global
-g Undefined symbols made global
-z Disable case sensitivity for symbols
Debugging:
-j Enable NoICE Debug Symbols
-y Enable SDCC Debug Symbols
The ASxxxx assemblers are command line oriented. Most sys-
tems require the option(s) and file(s) arguments to follow the
ASxxxx assembler name:
as6809 [-Options] [-Option with arg] file1 [file2 ...]
THE ASSEMBLER PAGE 1-63
INVOKING ASXXXX
Some systems may request the arguments after the assembler is
started at a system specific prompt:
as6809
argv: [-Options] [-Option with arg] file1 [file2 ...]
The ASxxxx options in some more detail:
-h List the ASxxxx options
Output:
-o enable object output file1.rel
The object output file name and/or extension can
be changed as desired using the -o+ option.
The list and symbol file names are changed to match
that of the object output file name. The list and
symbol file extensions cannot be changed as the
linker requires a .LST extension in order to create
the relocated, .RST, listing file.
-o+ Conditional Options -o+[ ][name][.ext]
'-o+.ext' (or) '-o+ .ext' -> file1.ext
'-o+name' (or) '-o+ name' -> name.rel
'-o+name.ext] (or) '-o+ name.ext' -> name.ext
-l create list file1[.lst] (file1 <- name)
If -s (symbol table output) is not
specified then the symbol table is
included at the end of the listing file.
-s create symbol file1[.sym] (file1 <- name)
Listing:
-d decimal listing
-q octal listing
-x hex listing (default)
The listing radix affects the
.lst, .rel, .hlr, and .sym files.
-b display .define substitutions in listing
If a .define substitution has been applied
to an assembler source line the source
THE ASSEMBLER PAGE 1-64
INVOKING ASXXXX
line is printed with the substitution.
-bb and display without .define substitutions
If a .define substitution has been applied
to an assembler source line the source
line is first printed without substitution
followed by the line with the substitution.
-c Disable instruction cycle count in listing
This option overrides the listing option
'cyc' in the .list and .nlist directives.
Instruction cycle counts cannot be enabled
if the -c option is specified.
-f by ` in the listing file
-ff by mode in the listing file
Relocatable modes are flagged by byte
position (LSB, Byte 2, Byte 3, MSB)
*nMN paged,
uvUV unsigned,
rsRS signed,
pqPQ program counter relative.
-k disable error messages to listing file
This option inhibits the listing of
error messages in the listing file
-p disable listing pagination
This option inhibits the generation
of a form-feed character and its
associated page header in the
assembler listing.
-u disable .list/.nlist processing
This option disables all .list and
.nlist directives. The listing mode
is .list with the options err, loc,
bin, eqt, cyc, lin, src, pag, lst,
and md. The options cyc and pag are
overridden by the -c and -p command
line options.
-w wide listing format for symbol table
THE ASSEMBLER PAGE 1-65
INVOKING ASXXXX
Assembly:
-i Insert assembler line before input file(s)
This option inserts an assembly source
line before the first file to be assembled.
e.g.: -i BUILD=2
If the insert contains white space then
delimit the insert. Inserted lines are
by default not listed. To list an inserted
line preced the insert with a .list insert.
e.g.: -i .list -i BUILD=2
-v Enable out of range signed / unsigned errors
This option enables checking for out of
range signed / unsigned values in symbol
equates and arithmetic operations. This
option has some ambiguities as internally
the assemblers use unsigned arithmetic
for calculations. (e.g. for a 2-byte machine
-32768 and 32768 are both represented as 0x8000)
-n# Set the maximum number of 'Pass 2' scans
Specify a maximum number of 'Pass 2' scans
to resolve multiple level forward referencing
and variable length instruction formats.
Symbols:
-a all user symbols made global
All defined (not local or external)
variables and symbols are flagged
as global.
-g undefined symbols made global
Unresolved (external) variables
and symbols are flagged as global.
-z disable case sensitivity for symbols
Debugging:
-j enable NOICE debug symbols
-y enable SDCC debug symbols
The file name for the .lst, .rel, .hlr, and .sym files is the
first file name specified in the command line. All output files
THE ASSEMBLER PAGE 1-66
INVOKING ASXXXX
are ascii text files which may be edited, copied, etc. The out-
put files are the concatenation of all the input files, if files
are to be assembled independently invoke the assembler for each
file.
The .rel file contains a radix directive so that the linker
will use the proper conversion for this file. Linked files may
have different radices.
The ASxxxx assemblers also have several 'hidden' options
which are not shown in the usage message. These are:
-r Include assembler line numbers
in the .hlr hint file
-rr Also include non listed line
numbers in the .hlr hint file
-t Show Assembler Pass Count (-n#),
Include File and Macro Expansion
levels, and memory allocations for
the assembler and macro processor
-tt Show Assembler Pass Count (-n#),
Include File and Macro Expansion
levels, and memory allocations for the
assembler and macro processor without
the macro allocation optimization
1.6 ERRORS
The ASxxxx assemblers provide limited diagnostic error codes
during the assembly process, these errors will be noted in the
listing file and printed on the stderr device.
The assembler reports the errors on the stderr device as
?ASxxxx-Error-<*> in line nnn of filename
where * is the error code, nnn is the line number, and filename
is the source/include file. This line is followed by a generic
error message for the <*> error code.
The errors are:
<.> This error is caused by an absolute direct assign-
ment of the current location counter
. = expression (incorrect)
THE ASSEMBLER PAGE 1-67
ERRORS
rather than the correct
. = . + expression
Indicates a machine specific addressing or address-
ing mode error.
Indicates a direct page boundary error.
Indicates modulus of .bndry directives to large.
Indicates a direct page addressing error.
Caused by a .error or .assume directive.
Caused by an .include file error or an .if/.endif
mismatch.
Multiple definitions of the same label, multiple
.module directives, multiple conflicting attributes
in an .area or .bank directive or the use of .hilo
and lohi within the same assembly.
An .mexit, .endm, or .narg directive outside of a
macro, repeat block or indefinite repeat block.
Directive or mnemonic error or the use of the .org
directive in a relocatable area.
Phase error: label location changing between passes
2 and 3. Normally caused by having more than one
level of forward referencing.
Questionable syntax: missing or improper operators,
terminators, or delimiters.
Relocation error: logic operation attempted on a
relocatable term, addition of two relocatable terms,
subtraction of two relocatable terms not within the
same programming area or external symbols.
String Substitution / recursion error.
Undefined symbol encountered during assembly.
Divide by 0 or Modulus by 0 error: result is 0.
Most assemblers now include more descriptive error messages
for , , and errors. Those assemblers updated to
THE ASSEMBLER PAGE 1-68
ERRORS
provide the expanded error messages will show three lines on the
stdout device as shown by this error:
?ASxxxx-Error- in line 1867 of tez80e.asm
'1867 ld.l sp,(var1) ;a'
Only .SIS and .LIL suffixes allowed.
The first line is the basic error in line xxxx message. The
second line lists the actual line in error followed by a third
line containing the more specific error.
The listing file (.lst) will have the first and third lines
of the error message inserted preceding the line containing the
error.
1.7 LISTING FILE
The (-l) option produces an ascii output listing file. Each
page of output contains a five line header:
1. The ASxxxx program name and page number
2. Assembler Radix, Address Bits, Date, and Time
3. Title from a .title directive (if any)
4. Subtitle from a .sbttl directive (if any)
5. Blank line
Each succeeding line contains six fields:
1. Error field (first two characters of line)
2. Current location counter
3. Generated code in byte format
4. Opcode cycles count
5. Source text line number
THE ASSEMBLER PAGE 1-69
LISTING FILE
6. Source text
The error field may contain upto 2 error flags indicating any
errors encountered while assembling this line of source code.
The current location counter field displays the 16-bit,
24-bit, or 32-bit program position. This field will be in the
selected radix.
The generated code follows the program location. The listing
radix determines the number of bytes that will be displayed in
this field. Hexadecimal listing allows six bytes of data within
the field, decimal and octal allow four bytes within the field.
If more than one field of data is generated from the assembly of
a single line of source code, then the data field is repeated on
successive lines.
The opcode cycles count is printed within the delimiters [ ]
on the line with the source text. This reduces the number of
generated code bytes displayed on the line with the source list-
ing by one. (The -c option disables all opcode cycle listing.)
The source text line number is printed in decimal and is fol-
lowed by the source text. A Source line with a .page directive
is never listed. (The -u option overrides this behavior.)
Two additional options are available for printing the source
line text. If the -b option is specified then the listed source
line contains all the .define substitutions. If the -bb option
is specified then the original source line is printed before the
source line with substitutions.
Two data field options are available to flag those bytes
which will be relocated by the linker. If the -f option is
specified then each byte to be relocated will be preceded by the
'`' character. If the -ff option is specified then each byte to
be relocated will be preceded by one of the following
characters:
1. * paged relocation
2. u low byte of unsigned word or unsigned byte
3. v high byte of unsigned word
4. p PCR low byte of word relocation or PCR byte
THE ASSEMBLER PAGE 1-70
LISTING FILE
5. q PCR high byte of word relocation
6. r low byte relocation or byte relocation
7. s high byte relocation
Assemblers which use 24-bit or 32-bit addressing use an ex-
tended flagging mode:
1. * paged relocation
2. u 1st byte of unsigned value
3. v 2nd byte of unsigned value
4. U 3rd byte of unsigned value
5. V 4th byte of unsigned value
6. p PCR 1st byte of relocation value or PCR byte
7. q PCR 2nd byte of relocation value
8. P PCR 3rd byte of relocation value
9. Q PCR 4th byte of relocation value
10. r 1st byte of relocation value or byte relocation
11. s 2nd byte of relocation value
12. R 3rd byte of relocation value
13. S 4th byte of relocation value
THE ASSEMBLER PAGE 1-71
SYMBOL TABLE FILE
1.8 SYMBOL TABLE FILE
The symbol table has two parts:
1. The alphabetically sorted list of symbols and/or labels
defined or referenced in the source program.
2. A list of the program areas defined during assembly of
the source program.
The sorted list of symbols and/or labels contains the follow-
ing information:
1. Program area number (none if absolute value or exter-
nal)
2. The symbol or label
3. Directly assigned symbol is denoted with an (=) sign
4. The value of a symbol, location of a label relative to
the program area base address (=0), or a **** indicat-
ing the symbol or label is undefined.
5. The characters: G - global, L - local,
R - relocatable, and X - external.
The list of program areas provides the correspondence between
the program area numbers and the defined program areas, the size
of the program areas, and the area flags (attributes).
1.9 OBJECT FILE
The object file is an ascii file containing the information
needed by the linker to bind multiple object modules into a com-
plete loadable memory image. The object module contains the
following designators:
[XDQ][HL][234]
X Hexadecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
THE ASSEMBLER PAGE 1-72
OBJECT FILE
L Least significant byte first
2 16-Bit Addressing
3 24-Bit Addressing
4 32-Bit Addressing
H Header
M Module
G Merge Mode
B Bank
A Area
S Symbol
T Object code
R Relocation information
P Paging information
Refer to the linker for a detailed description of each of the
designators and the format of the information contained in the
object file.
1.10 HINT FILE
The hint file is an ascii file containing information needed
by the linker to convert the listing file into a relocated list-
ing file. Each line in the .hlr file corresponds to a single
line in the listing file. The text line usually contains 3 or 4
parameters in the radix selected for the assembler as shown in
the following table:
Line Position: 123456789012
------------
Octal: 111 222 333
Decimal: 111 222 333
Hex: 11 22 33
Parameter 1 specifies the parameters listed in the line.
A bit is set for each listing option enabled during the
assembly of the line.
BIT 0 - LIST_ERR Error Code(s)
BIT 1 - LIST_LOC Location
BIT 2 - LIST_BIN Generated Binary Value(s)
BIT 3 - LIST_EQT Assembler Equate Value
BIT 4 - LIST_CYC Opcode Cycles
BIT 5 - LIST_LIN Line Numbers
BIT 6 - LIST_SRC Assembler Source Code
THE ASSEMBLER PAGE 1-73
HINT FILE
BIT 7 - HLR_NLST Listing Inhibited
Parameter 2 is the internal assembler listing mode
value specified for this line during the assembly process:
0 - NLIST No listing
1 - SLIST Source only
2 - ALIST Address only
3 - BLIST Address only with allocation
4 - CLIST Code
5 - ELIST Equate only
6 - ILIST IF conditional evaluation
Parameter 3 is the number of output bytes listed
for this line.
The 4th parameter is only output if an equate references a
value in a different area. The area name is output in the fol-
lowing format following the 3 parameters described above:
Line Position: 123456789012
------------
Area Name: equatearea
When the line number is output to the .hlr file (-r option)
the line number is prepended to the 3 or 4 parameters described
above. The line number is always in decimal in the following
format:
Line Position: 1234567
-------
Decimal: LLLLL
Thus the four formats (for each radix) that may be present in
a .hlr file are:
Line Position: 123456789012345678901234567890
------------------------------
11 22 33
11 22 33 equatearea
LLLLL 11 22 33
LLLLL 11 22 33 equatearea
The linker understands these formats without any user inter-
action.
CHAPTER 2
THE MACRO PROCESSOR
2.1 DEFINING MACROS
By using macros a programmer can use a single line to insert
a sequence of lines into a source program.
A macro definition is headed by a .macro directive followed
by the source lines. The source lines may optionally contain
dummy arguments. If such arguments are used, each one is listed
in the .macro directive.
A macro call is the statement used by the programmer to call
the macro source program. It consists of the macro name fol-
lowed by the real arguments needed to replace the dummy argu-
ments used in the macro.
Macro expansion is the insertion of the macro source lines
into the main program. Included in this insertion is the
replacement of the dummy arguments by the real arguments.
Macro directives provide a means to manipulate the macro ex-
pansions. Only one directive is allowed per source line. Each
directive may have a blank operand field or one or more
operands. Legal operands differ with each directive. The
macros and their associated directives are detailed in this
chapter.
Macro directives can replace any machine dependent mnemonic
associated with a specific assembler. However, the basic assem-
bler directives cannot be replaced with a macro.
THE MACRO PROCESSOR PAGE 2-2
DEFINING MACROS
2.1.1 .macro Directive
Format:
[label:] .macro name, dummy argument list
where: label represents an optional statement label.
name represents the user-assigned symbolic
name of the macro. This name may be
any legal symbol and may be used as a
label elsewhere in the program. The
macro name is not case sensitive,
name, NAME, or nAmE all refer to the
same macro.
, represents a legal macro separator
(comma, space, and/or tab).
dummy represents a number of legal symbols
argument that may appear anywhere in the body of
list the macro definition, even as a label.
These dummy symbols can be used elsewhere
in the program with no conflict of
definition. Multiple dummy arguments
specified in this directive may be
separated by any legal separator. The
detection of a duplicate or an illegal
symbol in a dummy argument list
terminates the scan and causes a
error to be generated.
A comment may follow the dummy argument list in a .macro direc-
tive, as shown below:
.macro abs a,b ;Defines macro abs
The first statement of a macro definition must be a .macro
directive. Defining a macro with the same name as an existing
macro will generate an error. The .mdelete directive should
be used to delete the previous macro definition before redefin-
ing a macro.
THE MACRO PROCESSOR PAGE 2-3
DEFINING MACROS
2.1.2 .endm Directive
Format:
.endm
The .endm directive should not have a label. Because the direc-
tives .irp, .irpc, and .rept may repeat more than once the label
will be defined multiple times resulting in and/or er-
rors.
The .endm directive may be followed by a comment field, as
shown below:
.endm ;end of macro
A comment may follow the dummy argument list in a .macro
directive, as shown below:
.macro typemsg message ;Type a message.
jsr typemsg
.word message
.endm ;End of typemsg
The final statement of every macro definition must be a .endm
directive. The .endm directive is also used to terminate inde-
finite repeat blocks and repeat blocks. A .endm directive en-
countered outside a macro definition is flagged with an
error.
2.1.3 .mexit Directive
Format:
.mexit
The .mexit directive may be used to terminate a macro expansion
before the end of the macro is encountered. This directive is
also legal within repeat blocks. It is most useful in nested
macros. The .mexit directive terminates the current macro as
though a .endm directive had been encountered. Using the .mexit
directive bypasses the complexities of nested conditional direc-
tives and alternate assembly paths, as shown in the following
THE MACRO PROCESSOR PAGE 2-4
DEFINING MACROS
example:
.macro altr N,A,B
.
.
.
.if eq,N ;Start conditional Block
.
.
.
.mexit ;Terminate macro expansion
.endif ;End of conditional block
.
.
.
.endm ;Normal end of macro
In an assembly where the symbol N is replaced by zero, the
.mexit directive would assemble the conditional block and ter-
minate the macro expansion. When macros ar nested, a .mexit
directive causes an exit to the next higher level of macro ex-
pansion. A .mexit directive encountered outside a macro defini-
tion is flagged with an error.
2.2 CALLING MACROS
Format:
[label:] name real arguments
where: label represents an optional statement label.
name represents the name of the macro, as
specified in the macro definition.
real represent symbolic arguments which
arguments replace the dummy arguments listed
in the .macro definition. When
multiple arguments occur, they are
separated by any legal separator.
Arguments to the macro call are
treated as character strings, their
usage is determined by the macro
definition.
A macro definition must be established by means of the .macro
THE MACRO PROCESSOR PAGE 2-5
CALLING MACROS
directive before the macro can be called and expanded within the
source program.
When a macro name is the same as a user label, the appearance
of the symbol in the operator field designates the symbol as a
macro call; the appearance of the symbol in the operand field
designates it as a label, as shown below:
LESS: mov @r0,r1 ;LESS is a label
.
.
.
bra LESS ;LESS is considered a label
.
.
.
LESS sym1,sym2 ;LESS is a macro call
2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
Multiple arguments within a macro must be separated by one of
the legal separating characters (comma, space, and/or tab).
Macro definition arguments (dummy) and macro call arguments
(real) maintain a strict positional relationship. That is, the
first real argument in a macro call corresponds with the first
dummy argument in the macro definition.
For example, the following macro definition and its asso-
ciated macro call contain multiple arguments:
.macro new a,b,c
.
.
.
new phi,sig,^/C1,C2/
Arguments which themselves contain separating characters must be
enclosed within the delimiter construct ^/ / where the
character '/' may be any character not in the argument string.
For example, the macro call:
new ^/exg x,y/,#44,ij
causes the entire expression
THE MACRO PROCESSOR PAGE 2-6
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
exg x,y
to replace all occurrences of the symbol a in the macro defini-
tion. Real arguments with a macro call are considered to be
character strings and are treated as a single entity during
macro expansion.
The up-arrow (^) construction also allows another up-arrow
construction to be passed as part of the argument. This con-
struction, for example, could have been used in the above macro
call, as follows:
new ^!^/exg x,y/!,#44,ij
causing the entire string ^/exg x,y/ to be passed as an argu-
ment.
2.3.1 Macro Nesting
Macro nesting occurs where the expansion of one macro in-
cludes a call to another macro. The depth of nesting is arbi-
trarily limited to 20.
To pass an argument containing legal argument delimiters to
nested macros, enclose the argument in the macro definition
within an up-arrow construction, as shown in the coding example
below. This extra set of delimiters for each level of nesting
is required in the macro definition, not the in the macro call.
.macro level1 dum1,dum2
level2 ^/dum1/
level2 ^/dum2/
.endm
.macro level2 dum3
dum3
add #10,z
push z
.endm
A call to the level1 macro, as shown below, for example:
level1 ^/leaz 0,x/,^/tfr x,z/
causes the following macro expansion to occur:
THE MACRO PROCESSOR PAGE 2-7
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
leaz 0,x
add #10,z
push z
tfr x,z
add #10,z
push z
When macro definitions are nested, the inner definition cannot
be called until the outer macro has been called and expanded.
For example, in the following code:
.macro lv1 a,b
.
.
.
.macro lv2 c
.
.
.
.endm
.endm
the lv2 macro cannot be called and expanded until the lv1 macro
has been expanded. Likewise, any macro defined within the lv2
macro definition cannot be called and expanded until lv2 has
also been expanded.
2.3.2 Special Characters in Macro Arguments
If an argument does not contain spaces, tabs, or commas it
may include special characters without enclosing them in a
delimited construction. For example:
.macro push arg
mov arg,-(sp)
.endm
push x+3(%2)
causes the following code to be generated:
mov x+3(%2),-(sp)
THE MACRO PROCESSOR PAGE 2-8
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
2.3.3 Passing Numerical Arguments as Symbols
If the unary operator backslash (\) precedes an argument, the
macro treats the argument as a numeric value in the current pro-
gram radix. The ascii characters representing this value are
inserted in the macro expansion, and their function is defined
in the context of the resulting code, as shown in the following
example:
.macro inc a,b
con a,\b
b = b + 1
.endm
.macro con a,b
a'b: .word 4
.endm
...
c = 0 ;Initialize
inc x,c
The above macro call (inc) would thus expand to:
x0: .word 4
In this expanded code, the label x0: results from the con-
catenation of two real arguments. The single quote (')
character in the label a'b: concatenates the real argument x
and 0 as they are passed during the expansion of the macro.
This type of argument construction is described in more detail
in a following section.
A subsequent call to the same macro would generate the fol-
lowing code:
x1: .word 4
and so on, for later calls. The two macro definitions are
necessary because the symbol associated with the dummy argument
b (that is, symbol c) cannot be updated in the con macro defini-
tion, because the character 0 has replaced c in the argument
string (inc x,c). In the con macro definition, the number
passed is treated as a string argument. (Where the value of the
real argument is 0, only a single 0 character is passed to the
macro expansion.
THE MACRO PROCESSOR PAGE 2-9
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
2.3.4 Number of Arguments in Macro Calls
A macro can be defined with or without arguments. If more
arguments appear in the macro call than in the macro definition,
a error is generated. If fewer arguments appear in the
macro call than in the macro definition, missing arguments are
assumed to be null values. The conditional directives .if b and
.if nb can be used within the macro to detect missing arguments.
The number of arguments can be determined using the .narg direc-
tive.
2.3.5 Creating Local Symbols Automatically
A label is often required in an expanded macro. In the con-
ventional macro facilities thus far described, a label must be
explicitly specified as an argument with each macro call. The
user must be careful in issuing subsequent calls to the same
macro in order avoid duplicating labels. This concern can be
eliminated through a feature of the ASxxxx macro facility that
creates a unique symbol where a label is required in an expanded
macro.
ASxxxx allows temporary symbols of the form n$, where n is a
decimal integer. Automatically created symbols are created in
numerical order beginning at 10000$.
The automatic generation of local symbols is invoked on each
call of a macro whose definition contains a dummy argument pre-
ceded by the question mark (?) character, as shown in the macro
definition below:
.macro beta a,?b ;dummy argument b with ?
tst a
beq b
add #5,a
b:
.endm
A local symbol is created automatically only when a real ar-
gument of the macro call is either null or missing, as shown in
Example 1 below. If the real argument is specified in the macro
call, however, generation of the local symbol is inhibited and
normal argument replacement occurs, as shown in Example 2 below.
(Examples 1 and 2 are both expansions of the beta macro defined
above.)
THE MACRO PROCESSOR PAGE 2-10
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
Example 1: Create a Local Symbol for the Missing Argument
beta flag ;Second argument is missing.
tst flag
beq 10000$ ;Local symbol is created.
add #5,flag
10000$:
Example 2: Do Not Create a Local Symbol
beta r3,xyz
tst r3
beq xyz
add #5,r3
xyz:
Automatically created local symbols resulting from the expan-
sion of a macro, as described above, do not establish a local
symbol block in their own right.
When a macro has several arguments earmarked for automatic
local symbol generation, substituting a specific label for one
such argument risks assembly errors because the arguments are
constructed at the point of macro invocation. Therefor, the ap-
pearance of a label in the macro expansion will create a new lo-
cal symbol block. The new local symbol block could leave local
symbol references in the previous block and their symbol defini-
tions in the new one, causing error codes in the assembly list-
ing. Furthermore a later macro expansion that creates local
symbols in the new block may duplicate one of the symbols in
question, causing an additional error code in the assembly
listing.
2.3.6 Keyword Arguments
Format:
name=string
where: name represents the dummy argument
string represents the real symbolic argument
The keyword argument may not contain embedded argument separa-
tors unless delimited as described earlier.
THE MACRO PROCESSOR PAGE 2-11
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
Macros may be defined with, and/or called with, keyword argu-
ments. When a keyword argument appears in the dummy argument
list of a macro definition, the specified string becomes the
default real argument at macro call. When a keyword argument
appears in the real argument list of a macro call, however, the
specified string becomes the real argument for the dummy argu-
ment that matches the specified name, whether or not the dummy
argument was defined with a keyword. If a match fails, a 'q'
error will be reported. If it is desired to pass a non-matching
argument of the keyword style then the argument must be
delimited.
A keyword argument may be specified anywhere in the argument
list of a macro definition and is part of the positional order-
ing of macro arguments. A keyword argument may also be speci-
fied anywhere in the real argument list of a macro call, but in
this case, does not effect the positional ordering of the argu-
ments.
1 .list (me)
2
3 ; MACRO With Dummy Arguments
4
5 .macro TBL name dev="NL",blk=0,flg=3
6 .word blk
7 .word flg
8 'name: .asciz dev
9 .even
10 .endm
11
12 ; Invoke Multiple Times
13
14 TBL NL
0000 00 00 6 .word 0
0002 00 03 7 .word 3
0004 4E 4C 00 8 NL: .asciz "NL"
0008 9 .even
15
16 TBL DY dev="DY0"
0008 00 00 6 .word 0
000A 00 03 7 .word 3
000C 44 59 30 00 8 DY: .asciz "DY0"
0010 9 .even
17
18 TBL RL dev="RL3",blk=20.
0010 00 14 6 .word 20.
0012 00 03 7 .word 3
0014 52 4C 33 00 8 RL: .asciz "RL3"
0018 9 .even
THE MACRO PROCESSOR PAGE 2-12
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
19
20 TBL DU dev="DU1",blk=1,flg=7
0018 00 01 6 .word 1
001A 00 07 7 .word 7
001C 44 55 31 00 8 DU: .asciz "DU1"
0020 9 .even
21
2.3.7 Concatenation of Macro Arguments
The apostrophe or single quote character (') operates as a
legal delimiting character in macro definitions. A single quote
that precedes and/or follows a dummy argument in a macro defini-
tion is removed, and the substitution of the real argument oc-
curs at that point. For example, in the following statements:
.macro def A,B,C
A'B: asciz "C"
.byte ''A,''B
.endm
when the macro def is called through the statement:
def x,y,^/V05.00/
it is expanded, as follows:
xy: asciz "V05.00"
.byte 'x,'y
In expanding the first line, the scan for the first argument
terminates upon finding the first apostrophe (') character.
Since A is a dummy argument, the apostrophe (') is removed. The
scan then resumes with B; B is also noted as another dummy ar-
gument. The two real arguments x and y are then concatenated to
form the label xy:. The third dummy argument is noted in the
operand field of the .asciz directive, causing the real argument
V05.00 to be substituted in this field.
When evaluating the arguments of the .byte directive during
expansion of the second line, the scan begins with the first
apostrophe (') character. Since it is neither preceded nor fol-
lowed by a dummy argument, this apostrophe remains in the macro
expansion. The scan then encounters the second apostrophe,
which is followed by a dummy argument and is therefor discarded.
The scan of argument A is terminated upon encountering the comma
(,). The third apostrophe is neither preceded nor followed by a
THE MACRO PROCESSOR PAGE 2-13
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
dummy argument and again remains in the macro expansion. The
fourth (and last) apostrophe is followed by another dummy argu-
ment and is likewise discarded. (Four apostrophe (') characters
were necessary in the macro definition to generate two apos-
trophe (') characters in the macro expansion.)
2.4 MACRO ATTRIBUTE DIRECTIVES
The ASxxxx assemblers have four directives that allow the
user to determine certain attributes of macro arguments: .narg,
.nchr, .ntyp, and .nval. The use of these directives permits
selective modifications of a macro expansion, depending on the
nature of the arguments being passed. These directives are
described below.
2.4.1 .narg Directive
Format:
[label:] .narg symbol
where: label represents an optional statement label.
symbol represents any legal symbol. This symbol
is equated to the number of arguments in
the macro call currently being expanded.
If a symbol is not specified, the .narg
directive is flagged with a error.
The .narg directive is used to determine the number of arguments
in the macro call currently being expanded. Hence, the .narg
directive can appear only within a macro definition; if it ap-
pears elsewhere, an error is generated.
The argument count includes null arguments as shown in the
following:
.macro pack A,B,C
.narg cnt
.
.
.
.endm
pack arg1,,arg3
THE MACRO PROCESSOR PAGE 2-14
MACRO ATTRIBUTE DIRECTIVES
pack arg1
When the first macro pack is invoked .narg will assign a value
of three (3) to the number of arguments cnt, which includes the
empty argument. The second invocation of macro pack has only a
single argument specified and .narg will assign a value of one
(1) to cnt.
2.4.2 .nchr Directive
Format:
[label:] .nchr symbol,string
where: label represents an optional statement label.
symbol represents any legal symbol. This symbol
is equated to the number of characters in
the string of the macro call currently
being expanded. If a symbol is not
specified, the .nchr directive is
flagged with a error.
, represents any legal separator (comma,
space, and/or tab).
string represents a string of printable 7-bit
ascii characters. If the character
string contains a legal separator
(comma, space and/or tab) the whole
string must be delimited using the
up-arrow (^) construct ^/ /.
If the delimiting characters do not
match or if the ending delimiter
cannot be detected because of a
syntactical error in the character
string, the .nchr directive reports
a error.
The .nchr directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the number of characters in a speci-
fied character string. This directive is useful in calculating
the length of macro arguments.
THE MACRO PROCESSOR PAGE 2-15
MACRO ATTRIBUTE DIRECTIVES
2.4.3 .ntyp Directive
Format:
[label:] .ntyp symbol,arg
where: label represents an optional statement label.
symbol represents any legal symbol. The symbol
is made absolute and equated to 0 if
arg is an absolute value or a non
relocatable symbol. The symbol is made
absolute and equated to 1 if arg is a
relocatable symbol. If a symbol is not
specified then the .ntyp directive is
flagged with a error.
, represents any legal separator (comma,
space, and/or tab).
arg represents any legal expression or
symbol. If arg is not specified
then the .ntyp directive is flagged
with a error.
The .ntyp directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the symbol or expression type as ab-
solute (0) or relocatable (1).
THE MACRO PROCESSOR PAGE 2-16
MACRO ATTRIBUTE DIRECTIVES
2.4.4 .nval Directive
Format:
[label:] .nval symbol,arg
where: label represents an optional statement label.
symbol represents any legal symbol. The symbol
is equated to the value of arg and made
absolute. If a symbol is not specified
then the .nval directive is flagged
with a error.
, represents any legal separator (comma,
space, and/or tab).
arg represents any legal expression or
symbol. If arg is not specified
then the .nval directive is flagged
with a error.
The .nval directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the value of arg and make the result
an absolute value.
2.5 INDEFINITE REPEAT BLOCK DIRECTIVES
An indefinite repeat block is similar to a macro definition
with only one dummy argument. At each expansion of the inde-
finite repeat range, this dummy argument is replaced with suc-
cessive elements of a real argument list. Since the repeat
directive and its associated range are coded in-line within the
source program, this type of macro definition and expansion does
not require calling the macro by name, as required in the expan-
sion of the conventional macros previously described.
An indefinite repeat block can appear within or outside
another macro definition, indefinite repeat block, or repeat
block. The rules specifying indefinite repeat block arguments
are the same as for specifying macro arguments.
THE MACRO PROCESSOR PAGE 2-17
INDEFINITE REPEAT BLOCK DIRECTIVES
2.5.1 .irp Directive
Format:
[label:] .irp sym,argument_list
.
.
(range of indefinite repeat block)
.
.
.endm
where: label represents an optional statement label.
sym represents a dummy argument that is
replaced with successive real arguments
from the argument list. If the dummy
argument is not specified, the .irp
directive is flagged with a error.
, represents any legal separator (comma,
space, and/or tab).
argument_list represents a list of real arguments
that are to be used in the expansion
of the indefinite repeat range. A real
argument may consist of one or more
7-bit ascii characters; multiple
arguments must be separated by any
legal separator (comma, space, and/or
tab). If an argument must contain
a legal separator then the up-arrow
(_^) construct is require for that
argument. If no real arguments are
specified, no action is taken.
range represents the block of code to be
repeated once for each occurrence of
a real argument in the list. The
range may contain other macro
definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the indefinite
repeat block range.
The .irp directive is used to replace a dummy argument with suc-
cessive real arguments specified in an argument list. This
THE MACRO PROCESSOR PAGE 2-18
INDEFINITE REPEAT BLOCK DIRECTIVES
replacement process occurs during the expansion of an indefinite
repeat block range.
2.5.2 .irpc Directive
Format:
[label:] .irpc sym,string
.
.
(range of indefinite repeat block)
.
.
.endm
where: label represents an optional statement label.
sym represents a dummy argument that is
replaced with successive real characters
from the argument string. If the dummy
argument is not specified, the .irpc
directive is flagged with a error.
, represents any legal separator (comma,
space, and/or tab).
string represents a list of 7-bit ascii
characters. If the string contains
legal separator characters (comma,
space, and/or tab) then the up-arrow
(_^) construct must delimit the string.
range represents the block of code to be
repeated once for each occurrence of
a real argument in the list. The
range may contain other macro
definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the indefinite
repeat block range.
The .irpc directive is available to permit single character sub-
stition. On each iteration of the indefinite repeat range, the
dummy argument is replaced with successive characters in the
specified string.
THE MACRO PROCESSOR PAGE 2-19
INDEFINITE REPEAT BLOCK DIRECTIVES
2.6 REPEAT BLOCK DIRECTIVE
A repeat block is similar to a macro definition with only one
argument. The argument specifies the number of times the repeat
block is inserted into the assembly stream. Since the repeat
directive and its associated range are coded in-line within the
source program, this type of macro definition and expansion does
not require calling the macro by name, as required in the expan-
sion of the conventional macros previously described.
A repeat block can appear within or outside another macro de-
finition, indefinite repeat block, or repeat block.
2.6.1 .rept Directive
Format:
[label:] .rept exp
.
.
(range of repeat block)
.
.
.endm
where: label represents an optional statement label.
exp represents any legal expression.
This value controls the number of
times the block of code is to be assembled
within the program. When the expression
value is less than or equal to zero (0),
the repeat block is not assembled. If
this value is not an absolute value, the
.rept directive is flagged with an
error.
range represents the block of code to be
repeated. The range may contain other
macro definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the repeat block
range.
The .rept directive is used to duplicate a block of code, a
THE MACRO PROCESSOR PAGE 2-20
REPEAT BLOCK DIRECTIVE
certain number of times, in line with other source code.
2.7 MACRO DELETION DIRECTIVE
The .mdelete directive deletes the definitions of the speci-
fied macro(s).
2.7.1 .mdelete Directive
Format:
.mdelete name1,name2,...,namen
where: name1, represent legal macro names. When multiple
name2, names are specified, they are separated
..., by any legal separator (comma, space, and/or
namen tab).
2.8 MACRO INVOCATION DETAILS
The invocation of a macro, indefinite repeat block, or repeat
block has specific implications for .if-.else-.endif constructs
and for .list-.nlist directives.
At the point a macro, indefinite repeat block, or repeat
block is called the following occurs:
1) The initial .if-.else-.endif
state is saved.
2) The initial .list-.nlist
state is saved.
3) The macro, indefinite repeat block,
or repeat block is inserted into the
assembler source code stream. All
argument substitution is performed
at this point.
When the macro completes and after each pass through an inde-
finite repeat block or repeat block the .if-.else-.endif and
.list-.nlist state is reset to the initial state.
THE MACRO PROCESSOR PAGE 2-21
MACRO INVOCATION DETAILS
The reset of the .if-.else-.endif state means that the invo-
cation of a macro, indefinite repeat block, or repeat block can-
not change the .if-.else-.endif state of the calling code. For
example the following code does not change the .if-.else-.endif
condition at macro completion:
.macro fnc A
.if nb,^!A!
...
.list (meb)
.mexit
.else
...
.nlist
.mexit
.endif
.endm
code: fnc
Within the macro the .if condition becomes false but the con-
dition is not propagated outside the macro.
Similarly, when the .list-.nlist state is changed within a
macro the change is not propagated outside the macro.
The normal .if-.else-.endif processing verifies that every
.if has a corresponding .endif. When a macro, indefinite repeat
block, or repeat block terminates by using the .mexit directive
the .if-.endif checking is bypassed because all source lines
between the .mexit and .endm directives are skipped.
2.9 CONTROLLING MACRO LISTINGS
The basic .list directive enables listing of all fields in
the assembler listing and clears the 'me', 'meb' and 'mel' op-
tions.
When a macro is entered the listing is by default inhibited
unless the 'me' (enable listing), 'meb' (list only binary and
location), or 'mel' (enable listing forcing binary and location)
options have been specified. The 'me' option simply enables any
previously set listing options. The 'meb' option clears all
listing options and sets the 'bin' and 'loc' options. The 'mel'
option enables the previously set listing options and forces the
THE MACRO PROCESSOR PAGE 2-22
CONTROLLING MACRO LISTINGS
'bin' and 'loc' options. If no listing options have been set
then a list 'me' option will not cause any listing.
Within a macro the .list/.nlist directives can set or clear
any of the listing options but listing will only occur when the
'me' option is set.
2.10 BUILDING A MACRO LIBRARY
Using the macro facilities of the ASxxxx assemblers a simple
macro library can be built. The macro library is built by com-
bining individual macros, sets of macros, or include file direc-
tives into a single file. Each macro entity is enclosed within
a .if/.endif block that selects the desired macro definitions.
The selection of specific macros to be imported into a pro-
gram is performed by three macros, .mlib, .mcall, and .mload,
contained in the file mlib.def.
2.10.1 .mlib Macro Directive
Format:
.mlib file
where: file represents the macro library file name.
If the file name does not include a path
then the path of the current assembly
file is used. If the file name (and/or
path) contains white space then the
path/name must be delimited with the
up-arrow (^) construct ^/ /.
The .mlib directive defines two macros, .mcall and .mload, which
when invoked will read a file, importing specific macro defini-
tions. Any previous .mcall and/or .mload directives will be
deleted before the new .mcall and .mload directives are defined.
The .mload directive is an internal directive which simply
includes the macro library file with the listing disabled.
The following is the mlib.def file which defines the macros
.mlib, .mcall, and .mload.
THE MACRO PROCESSOR PAGE 2-23
BUILDING A MACRO LIBRARY
;************************************************
;* *
;* A simple Macro Library Implementation *
;* *
;* December 2008 *
;* *
;************************************************
.macro .mlib FileName
.if b,^!FileName!
.error 1 ; File Name Required
.mexit
.endif
.mdelete .mcall
.macro .mcall a,b,c,d,e,f,g,h
.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
.iif nb,^!sym! .define .$$.'sym
.endm
.mload
.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
.if nb,^!sym!
.iif ndef,sym'.$$. .error 1 ; macro not found
.undefine .$$.'sym
.undefine sym'.$$.
.endif
.endm
.endm ;.mcall
.mdelete .mload
.macro .mload
.nlist
.include ^!FileName!
.list
.endm ;.mload
.endm ;.mlib
2.10.2 .mcall Macro Directive
Format:
.mcall macro1,macro2,...,macro8
where:
macro1, represents from 1 to 8 macro library
macro2, references to a macro definition or
..., set of macro definitions included in
macro8 the file specified with the .mlib macro.
THE MACRO PROCESSOR PAGE 2-24
BUILDING A MACRO LIBRARY
As can be seen from the macro definition of .mlib and .mcall
shown above, when .mcall is invoked temporary symbols are de-
fined for each macro or macro set that is to be imported. The
macro .mload is then invoked to load the macro library file
specified in the call to .mlib.
For example, when the following macros are invoked:
.mlib crossasm.sml ; Cross Assembler Macros
.mcall M6809 ; M6809 Macro Group
The .mlib macro defines the .mload macro to access the system
macro file crossasm.sml. Invoking the .mcall macro creates a
temporary symbol, '.$$.M6809', and then invokes the macro .mload
to import the system macro file crossasm.sml. The file cros-
sasm.sml contains conditional statements that define the re-
quired macros and creates a temporary symbol 'M6809.$$.' to
indicate the macro group was found. If the macro is not found
an error message is generated.
The following is a small portion of the crossasm.sml system
macro file which shows the M6809 macro group:
.title Cross Assembler Macro Library
; This MACRO Library is Case Insensitive.
;
...
; Macro Based 6809 Cross Assembler
.$.SML.$. =: 0
.if idn a,A
.iif def,.$$.m6809 .$.SML.$. = -1
.else
.iif def,.$$.m6809 .$.SML.$. = -1
.iif def,.$$.M6809 .$.SML.$. = 1
.endif
.iif lt,.$.SML.$. .define m6809.$$.
.iif gt,.$.SML.$. .define M6809.$$.
.iif ne,.$.SML.$. .include "m6809.mac"
...
THE MACRO PROCESSOR PAGE 2-25
EXAMPLE MACRO CROSS ASSEMBLERS
2.11 EXAMPLE MACRO CROSS ASSEMBLERS
The 'ascheck' subdirectory 'macroasm' contains 7 assemblers
written using only the general macro processing facility of the
ASxxxx assemblers:
i8085.mac - 8085 Microprocessor
m6800.mac - 6800 Microprocessor
m6801.mac - 6801 Microprocessor
m6804.mac - 6804 Microprocessor
m6805.mac - 6805 Microprocessor
m6809.mac - 6809 Microprocessor
s2650.mac - 2650 Microprocessor
These absolute macro cross assemblers are included to il-
lustrate the functionality of the general macro processing
facility of the ASxxxx assemblers. In general they are useful
examples of actual macro implementations.
CHAPTER 3
THE LINKER
3.1 ASLINK RELOCATING LINKER
ASLINK is the companion linker for the ASxxxx assemblers.
The linker supports versions 3.xx, 4.xx, and 5.xx of the ASxxxx
assemblers. Object files from version 3, 4, and 5 may be freely
mixed while linking. Note that version 3 object files contain
only a subset of the options available in versions 4 and 5.
The program ASLINK is a general relocating linker performing
the following functions:
1. Bind multiple object modules into a single memory image
2. Resolve inter-module symbol references
3. Combine code belonging to the same area from multiple
object files into a single contiguous memory region
4. Search and import object module libraries for undefined
global variables
5. Perform byte and word program counter relative
(pc or pcr) addressing calculations
6. Define absolute symbol values at link time
7. Define absolute area base address values at link time
8. Produce Intel Hex, Motorola S, or Tandy CoCo Disk Basic
output files
THE LINKER PAGE 3-2
ASLINK RELOCATING LINKER
9. Produce a map of the linked memory image
10. Produce an updated listing file with the relocated ad-
dresses and data
THE LINKER PAGE 3-3
ASLINK RELOCATING LINKER
3.2 INVOKING ASLINK
Starting ASlink without any arguments provides the following
option list and then exits:
Usage: [-Options] [-Option with arg] file1 [file2 ...]
-h or NO ARGUMENTS Show this help list
-p Echo commands to stdout (default)
-n No echo of commands to stdout
Alternates to Command Line Input:
-c ASlink >> prompt input
-f file[.lnk] Command File input
Librarys:
-k Library path specification, one per -k
-l Library file specification, one per -l
Relocation:
-a Area base address=expression
-b Bank base address=expression
-g Global symbol=expression
Map format:
-m Map output generated as file1[.map]
-m1 Linker generated symbols included in file1[.map]
-w Wide listing format for map file
-x Hexadecimal (default)
-d Decimal
-q Octal
Output:
-i Intel Hex as file1[.hex]
-s Motorola S Record as file1[.s--]
-t Tandy CoCo Disk BASIC binary as file1[.bin]
-*+ -i+/-s+/-t+ Renaming Options -*+[ ][name][.ext]
'-*+.ext' (or) '-*+ .ext' -> file1.ext
'-*+name' (or) '-*+ name' -> name[.---]
'-*+name.ext' (or) '-*+ name.ext' -> name.ext
-o Linked file/library -i/-s/-t output enable (default)
-v Linked file/library -i/-s/-t output disable
-j NoICE Debug output as file1[.noi]
-y SDCDB Debug output as file1[.cdb]
List:
-u Update listing file(s) with link data as file(s)[.rst]
Case Sensitivity:
-z Disable Case Sensitivity for Symbols
End:
-e or null line terminates input
THE LINKER PAGE 3-4
INVOKING ASLINK
NOTE
When ASlink is invoked with a single or multiple
filenames the first filename is the output filename
and the remaining files, if any, are linked together
into the output filename.
Most sytems require the options to be entered on the command
line:
aslink [-Options] [-Options with args] file1 [file2 ...]
Some systems may request the arguments after the linker is
started at a system specific prompt:
aslink
argv: [-Options] [-Option with args] file1 [file2 ...]
The linker commands are explained in some more detail:
-h or NO ARGUMENTS show this help list
Simply prints the help list on stdout.
-c ASlink >> prompt mode.
The ASlink#>> prompt mode reads
linker commands from stdin.
-f file[.lnk] Command File Input
The command file mode imports linker
commands from the specified file
(extension must be .lnk), imported
-c and -f commands are ignored. If
the directory path, for a file to
be linked, is not specified in the
command file then the path defaults
to the command file directory path.
-p/-n enable/disable echoing commands to stdout.
-i Intel Hex as file1[.hex]
-s Motorola S Record as file1[.s--]
THE LINKER PAGE 3-5
INVOKING ASLINK
-t Tandy CoCo Disk BASIC binary as file1[.bin]
-*+ -i+/-s+/-t+ Renaming Options -o+[ ][name][.ext]
'-*+.ext' (or) '-*+ .ext' -> file1.ext
'-*+name' (or) '-*+ name' -> name[.---]
'-*+name.ext' (or) '-*+ name.ext' -> name.ext
The file name and/or extension of the
output file may be changed.
-o Linked file/library output enabled (default)
Specifies that subsequent linked
files/libraries will enable object output.
(if option -i, -s, or -t was specified)
-v Linked file/library output disabled
Specifies that subsequent linked
files/libraries will disable object output.
(if option -i, -s, or -t was specified)
-z Disable Case Sensitivity for Symbols
Disables the distinction between
upper and lower case letters.
-m Map output generated as file1[.map]
Generate a map file (file1.map). This
file contains a list of the symbols
(by area) with absolute addresses,
sizes of linked areas, and other
linking information.
-m1 Linker generated symbols included in file1[.map]
The linker creates internal symbols for
each area (area segment) input during
the linking process but normally suppresses
their inclusion in the map file. This
option enables their inclusion in the
map file.
-w Wide listing format for map file
Specifies that a wide listing format
be used for the map file.
THE LINKER PAGE 3-6
INVOKING ASLINK
-x Hexadecimal (default)
-d Decimal
-q Octal
Specifies the number radix for the map file.
-u Update listing file(s) with link data
Generate updated listing file(s) derived from
the relocated addresses and data from the
linker and the hint file (file.hlr) output
by the assembler.
-a Area base address=expression
This specifies an area base address
where the expression may contain
constants and/or defined symbols
from the linked files. (one definition
per line in a linker command file.)
-b Bank base address=expression
This specifies a bank base address
where the expression may contain
constants and/or defined symbols
from the linked files. (one definition
per line in a linker command file.)
-g Global symbol=expression
This specifies the value for the
symbol where the expression may contain
constants and/or defined symbols
from the linked files. (one definition
per line in a linker command file.)
-k Library path specification, one per -k
This specifies one possible path to an
object library. More than one path is
allowed. (one definition per line in
a linker command file.)
-l Library file specification, one per -l
This specifies a possible library file.
More than one file is allowed. (one
definition per line in a linker command file.)
THE LINKER PAGE 3-7
INVOKING ASLINK
-e or null line, terminates input
This -e option terminates the processing
of a linker command file (-f). Any
lines remaining in the file are ignored.
When using the command line all options and file(s) must be
on a single line.
When using the -c option (ASlink >>) or a command file [.lnk]
options should precede the file(s). The files may be on the
same line as the options or on a separate line(s) one file per
line or multiple files separated by spaces or tabs. The use of
multiple -o and -v options is available only with the interrac-
tive, ASlink >>, or command file modes.
3.3 LIBRARY PATH(S) AND FILE(S)
The process of resolving undefined symbols after scanning the
input object files includes the scanning of object module
libraries. The linker will search through all combinations of
the library path specifications (input by the -k option) and the
library file specifications (input by the -l option) that lead
to an existing library file. Each library file contains a list
(one file per line) of modules included in this particular
library. Each existing object module is scanned for a match to
the undefined symbol. The first module containing the symbol is
then linked with the previous modules to resolve the symbol de-
finition. The library object modules are rescanned until no
more symbols can be resolved. The scanning algorithm allows
resolution of back references. No errors are reported for non
existent library files or object modules.
The library file specification may be formed in one of two
ways:
1. If the library file contained an absolute path/file
specification then this is the object module's
path/file.
(i.e. C:\... or C:/...)
2. If the library file contains a relative path/file
specification then the concatenation of the path and
this file specification becomes the object module's
path/file.
(i.e. \... or /...)
THE LINKER PAGE 3-8
LIBRARY PATH(S) AND FILE(S)
As an example, assume there exists a library file termio.lib
in the syslib directory specifying the following object modules:
\6809\io_disk first object module
d:\special\io_comm second object module
and the following parameters were specified to the linker:
-k c:\iosystem\ the first path
-k c:\syslib\ the second path
-l termio the first library file
-l io the second library file (no such file)
The linker will attempt to use the following object modules to
resolve any undefined symbols:
c:\syslib\6809\io_disk.rel (concatenated path/file)
d:\special\io_comm.rel (absolute path/file)
all other path(s)/file(s) don't exist. (No errors are reported
for non existent path(s)/file(s).)
3.4 ASLINK PROCESSING
The linker processes the files in the order they are
presented. The first pass through the input files is used to
define all program areas, the section area sizes, and symbols
defined or referenced. Undefined symbols will initiate a search
of any specified library file(s) and the importing of the module
containing the symbol definition. After the first pass the -a
(area base address) and the -b (bank base address) definitions
,if any, are processed and the areas linked.
The area linking proceeds by first examining the area types
ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
object modules are always overlaid and have been assembled at a
specific address, these are not normally relocated (if a -a op-
tion is used on an absolute area the area will be relocated).
Relative areas (normally defined as REL|CON) have a base address
of 0x0000 as read from the object files, the -a option specifies
the beginning address of the area. All subsequent relative
areas will be concatenated with preceding relative areas. Where
specific ordering is desired, the first linker input file should
have the area definitions in the desired order. At the comple-
tion of the area linking all area addresses and lengths have
been determined. The areas of type PAG are verified to be on a
THE LINKER PAGE 3-9
ASLINK PROCESSING
256 byte boundary and that the length does not exceed 256 bytes.
Any errors are noted on stderr and in the map file.
The linker also automatically generates two symbols for each
linked program area:
'a_' The starting address of the area.
'l_' The length of the area.
and two symbols for each area segment:
'm__n' The boundary modulus of the area segment.
's__n' The starting address of the area segment.
The appended '_n' signifies the area segment number within a
linked area.
These symbols are in general only useful diagnostically and
are not visible externally. However if the -m1 linker option is
used these symbols will be output to the map file.
Next the global symbol definitions (-g option), if any, are
processed. The symbol definitions have been delayed until this
point because the absolute addresses of all internal symbols are
known and can be used in the expression calculations.
Before continuing with the linking process the symbol table
is scanned to determine if any symbols have been referenced but
not defined. Undefined symbols are listed on the stderr device.
if a .module directive was included in the assembled file the
module making the reference to this undefined variable will be
printed.
Constants defined as global in more than one module will be
flagged as multiple definitions if their values are not identi-
cal.
After the preceding processes are complete the linker may
output a map file (-m option). This file provides the following
information:
1. Global symbol values and label absolute addresses
2. Defined areas and there lengths
3. Remaining undefined symbols
THE LINKER PAGE 3-10
ASLINK PROCESSING
4. List of modules linked
5. List of library modules linked
6. List of -a, -b and -g definitions
The final step of the linking process is performed during the
second pass of the input files. As the xxx.rel files are read
the code is relocated by substituting the physical addresses for
the referenced symbols and areas and may be output in Intel,
Motorola, or Tandy CoCo Disk Basic formats. The number of files
linked and symbols defined/referenced is limited by the proces-
sor space available to build the area/symbol lists. If the -u
option is specified then the listing files (file.lst) associated
with the relocation files (file.rel) are scanned and used to
create a new file (file.rst) which has all addresses and data
relocated to their final values.
The -o/-v options allow the simple creation of loadable or
overlay modules. Loadable and overlay modules normally need to
be linked with a main module(s) to resolve external symbols.
The -o/-v options can be used to enable object output for the
loadable or overlay module(s) and suppress the object code from
the linked main module(s). The -o/-v options can be applied
repeatedly to specify a single linked file, groups of files, or
libraries for object code inclusion or suppression.
THE LINKER Page 3-11
ASXXXX VERSION 5.XX (4.XX) LINKING
3.5 ASXXXX VERSION 5.XX (4.XX) LINKING
The linkers' input object file is an ascii file containing
the information needed by the linker to bind multiple object
modules into a complete loadable memory image.
The object module contains the following designators:
[XDQ][HL][234]
X Hexadecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
2 16-Bit Addressing
3 24-Bit Addressing
4 32-Bit Addressing
H Header
M Module
G Merge Mode
B Bank
A Area
S Symbol
T Object code
R Relocation information
P Paging information
3.5.1 Object Module Format
The first line of an object module contains the
[XDQ][HL][234] format specifier (i.e. XH2 indicates a hex-
adecimal file with most significant byte first and 16-bit ad-
dressing) for the following designators.
THE LINKER PAGE 3-12
ASXXXX VERSION 5.XX (4.XX) LINKING
3.5.2 Header Line
H aa areas gg global symbols
The header line specifies the number of areas(aa) and the
number of global symbols(gg) defined or referenced in this ob-
ject module segment.
3.5.3 Module Line
M name
The module line specifies the module name from which this
header segment was assembled. The module line will not appear
if the .module directive was not used in the source program.
3.5.4 Merge Mode Line
G nn ii 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
The mode structure contains the specification (or partial
specification) of one of the assemblers' merge modes. Sixteen
bits may be specified on a single line. Each assembler must
specify at least one merge mode. The merging specification al-
lows arbitrarily defined active bits and bit positions. The 32
element arrays are indexed from 0 to 31. Index 0 corresponds to
bit 0, ..., and 31 corresponds to bit 31 of a normal integer
value.
1. nn is merge mode number
2. ii is the beginning bit position of the following data
3. 00 ... merge mode bit elements
The value of the element specifies if the normal in-
teger bit is active (bit <7> is set, 0x80) and what
destination bit (bits <4:0>, 0 - 31) should be
loaded with this normal integer bit.
THE LINKER PAGE 3-13
ASXXXX VERSION 5.XX (4.XX) LINKING
3.5.5 Bank Line
B name base nn size nn map nn flags nn fsfx string
The B line defines a bank identifier as name. A bank is a
structure containing a collection of areas. The bank is treated
as a unique linking structure separate from other banks. Each
bank can have a unique base address (starting address). The
size specification may be used to signal the overflow of the
banks' allocated space. The Linker combines all areas included
within a bank as separate from other areas. The code from a
bank may be output to a unique file by specifying the File Suf-
fix parameter (fsfx). This allows the separation of multiple
data and code segments into isolated output files. The map
parameter is for NOICE processing. The flags indicate if the
parameters have been set.
3.5.6 Area Line
A label size ss flags ff [bank bb] [bndry mm]
The area line defines the area label, the size (ss) of the
area in bytes, the area flags (ff), the optional [bank bb]
specifies the bank this area is a member of, and the optional
[bndry mm] which specifies the boundary modulus for this area
segment. The area flags specify the ABS, REL, CON, OVR, and PAG
parameters:
OVR/CON (0x04/0x00 i.e. bit position 2)
ABS/REL (0x08/0x00 i.e. bit position 3)
PAG (0x10 i.e. bit position 4)
The bank label is optional and only specified if the area is
to be included within a bank.
When this area (area segment) is linked and their is a boun-
dary modulus specified then the code/data beginning address will
be increased to match the boundary modulus. This will also in-
crease the area (area segment) size by the same amount.
THE LINKER PAGE 3-14
ASXXXX VERSION 5.XX (4.XX) LINKING
3.5.7 Symbol Line
S name Defnnnn
or
S name Refnnnn
The symbol line defines (Def) or references (Ref) the identi-
fier name with the value nnnn. The defined value is relative to
the current area base address. References to constants and ex-
ternal global symbols will always appear before the first area
definition. References to external symbols will have a value of
zero.
3.5.8 T Line
T xx xx nn nn nn nn nn ...
The T line contains the assembled code output by the assem-
bler with xx xx being the offset address from the current area
base address and nn being the assembled instructions and data in
byte format. (xx xx and nn nn can be 2, 3, or 4 bytes as speci-
fied by the .REL file header.)
3.5.9 R Line
R 0 0 nn nn n1 n2 xx xx ...
The R line provides the relocation information to the linker.
The nn nn value is the current area index, i.e. which area the
current values were assembled. Relocation information is en-
coded in groups of 4 bytes:
1. n1 is the relocation mode and object format.
1. bits <1:0> specify the number of bytes to output
2. bits <2:3> normal(0x00) / MSB (0x0C)
signed(0x04) / unsigned(0x08)
3. bit 4 normal(0x00)/page '0' (0x10) reference
4. bit 5 normal(0x00)/page 'nnn' (0x20) reference
PAGX mode if both bits are set (0x30)
5. bit 6 normal(0x00)/PC relative(0x40) relocation
6. bit 7 relocatable area(0x00)/symbol(0x80)
2. n2 is a byte index and a merge mode index
THE LINKER PAGE 3-15
ASXXXX VERSION 5.XX (4.XX) LINKING
1. bits <3:0> are a byte index into the corresponding
(i.e. preceding) T line data (i.e. a pointer to
the data to be updated by the relocation).
2. bits <7:4> are an index into a selected merge mode.
Currently mode 0 simply specifies to use standard
byte processing modes and merging is ignored.
3. xx xx is the area/symbol index for the area/symbol be-
ing referenced. the corresponding area/symbol is found
in the header area/symbol lists.
The groups of 4 bytes are repeated for each item requiring relo-
cation in the preceding T line.
3.5.10 P Line
P 0 0 nn nn n1 n2 xx xx
The P line provides the paging information to the linker as
specified by a .setdp directive. The format of the relocation
information is identical to that of the R line. The correspond-
ing T line has the following information:
T xx xx aa aa bb bb
Where aa aa is the area reference number which specifies the
selected page area and bb bb is the base address of the page.
bb bb will require relocation processing if the 'n1 n2 xx xx' is
specified in the P line. The linker will verify that the base
address is on a 256 byte boundary and that the page length of an
area defined with the PAG type is not larger than 256 bytes.
The linker defaults any direct page references to the first
area defined in the input REL file. All ASxxxx assemblers will
specify the _CODE area first, making this the default page area.
THE LINKER PAGE 3-16
ASXXXX VERSION 5.XX (4.XX) LINKING
3.5.11 24-Bit and 32-Bit Addressing
When 24-bit or 32-bit addressing is specified in the file
format line [XDQ][HL][234] then the S and T Lines have modified
formats:
S name Defnnnnnn (24-bit)
S name Refnnnnnn (24-bit)
T xx xx xx nn nn nn nn nn ... (24-bit)
S name Defnnnnnnnn (32-bit)
S name Refnnnnnnnn (32-bit)
T xx xx xx xx nn nn nn nn nn ... (32-bit)
The multibyte formats for byte data replace the 2-byte form
for 16-bit data with 3-byte or 4-byte data for 24-bit or 32-bit
data respectively. The 2nd byte format (also named MSB) always
uses the second byte of the 2, 3, or 4-byte data.
3.5.12 ASlink V5.xx (V4.xx) Error Messages
The linker provides detailed error messages allowing the pro-
grammer to quickly find the errant code. As the linker com-
pletes pass 1 over the input file(s) it reports any page
boundary or page length errors as follows:
?ASlink-Warning-Paged Area PAGE0 Boundary Error
and/or
?ASlink-Warning-Paged Area PAGE0 Length Error
where PAGE0 is the paged area.
Also during Pass 1 any bank size (length) errors will be
reported as follows:
?ASlink-Warning-Size limit exceeded in bank BANK
where BANK is the bank name.
During Pass two the linker reads the T, R, and P lines per-
forming the necessary relocations and outputting the absolute
code. Various errors may be reported during this process
THE LINKER PAGE 3-17
ASXXXX VERSION 5.XX (4.XX) LINKING
The P line processing can produce only one possible error:
?ASlink-Warning-Page Definition Boundary Error
file module pgarea pgoffset
PgDef t6809l t6809l PAGE0 0001
The error message specifies the file and module where the .setdp
direct was issued and indicates the page area and the page
offset value determined after relocation.
The R line processing produces various error messages:
?ASlink-Warning-Signed value error
?ASlink-Warning-Unsigned value error
?ASlink-Warning-Byte PCR relocation error
?ASlink-Warning-Word PCR relocation error
?ASlink-Warning-3-Byte PCR relocation error
?ASlink-Warning-4-Byte PCR relocation error
?ASlink-Warning-Page0 relocation error
?ASlink-Warning-PageN relocation error
?ASlink-Warning-PageX relocation error
?ASlink-Warning-Signed Merge Bit Range error
?ASlink-Warning-Unsigned/Overflow Merge Bit Range error
These error messages also specify the file, module, area, and
offset within the area of the code referencing (Refby) and de-
fining (Defin) the symbol:
?ASlink-Warning-Signed value error for symbol two56
file module area offset
Refby t Pagetest PROGRAM 0006
Defin t Pagetest DIRECT 0100
If the symbol is defined in the same module as the reference the
linker is unable to report the symbol name. The assembler list-
ing file(s) should be examined at the offset from the specified
area to locate the offending code.
The errors are:
1. The Signed value error indicates an indexing value ex-
ceeded the maximum negative or maximum positive value
for the current variable size.
2. The Unsigned value error indicates an indexing value
was greater than maximum positive value for the current
variable size.
THE LINKER PAGE 3-18
ASXXXX VERSION 5.XX (4.XX) LINKING
3. The byte PCR error is caused by exceeding the pc rela-
tive byte branch range.
4. The word PCR error is caused by exceeding the pc rela-
tive word branch range.
5. The 3-byte PCR error is caused by exceeding the pc re-
lative 3-byte branch range.
6. The 4-byte PCR error is caused by exceeding the pc re-
lative 4-byte branch range.
7. The Page0 error is generated if the direct page vari-
able is not in the page0 range of 0 to 255.
8. The PageN error is generated if the direct page vari-
able is not within the Nth page range of 0 to 255.
9. The PageX error is generated if the direct page vari-
able is not within the extended page range.
10. The Signed Merge Bit Range error indicates an indexing
value exceeded the maximum negative or maximum positive
value for the current signed merge variable size.
11. The Unsigned/Overflow Merge Bit Range error indicates
an indexing value was greater than maximum positive
value for the current unsigned merge variable size.
THE LINKER Page 3-19
ASXXXX VERSION 3.XX LINKING
3.6 ASXXXX VERSION 3.XX LINKING
The linkers' input object file is an ascii file containing
the information needed by the linker to bind multiple object
modules into a complete loadable memory image.
The object module contains the following designators:
[XDQ][HL][234]
X Hexadecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
2 16-Bit Addressing
3 24-Bit Addressing
4 32-Bit Addressing
H Header
M Module
A Area
S Symbol
T Object code
R Relocation information
P Paging information
3.6.1 Object Module Format
The first line of an object module contains the
[XDQ][HL][234] format specifier (i.e. XH2 indicates a hex-
adecimal file with most significant byte first and 16-bit ad-
dressing) for the following designators.
THE LINKER PAGE 3-20
ASXXXX VERSION 3.XX LINKING
3.6.2 Header Line
H aa areas gg global symbols
The header line specifies the number of areas(aa) and the
number of global symbols(gg) defined or referenced in this ob-
ject module segment.
3.6.3 Module Line
M name
The module line specifies the module name from which this
header segment was assembled. The module line will not appear
if the .module directive was not used in the source program.
3.6.4 Area Line
A label size ss flags ff
The area line defines the area label, the size (ss) of the
area in bytes, and the area flags (ff). The area flags specify
the ABS, REL, CON, OVR, and PAG parameters:
OVR/CON (0x04/0x00 i.e. bit position 2)
ABS/REL (0x08/0x00 i.e. bit position 3)
PAG (0x10 i.e. bit position 4)
3.6.5 Symbol Line
S name Defnnnn
or
S name Refnnnn
The symbol line defines (Def) or references (Ref) the identi-
fier name with the value nnnn. The defined value is relative to
the current area base address. References to constants and ex-
ternal global symbols will always appear before the first area
definition. References to external symbols will have a value of
zero.
THE LINKER PAGE 3-21
ASXXXX VERSION 3.XX LINKING
3.6.6 T Line
T xx xx nn nn nn nn nn ...
The T line contains the assembled code output by the assem-
bler with xx xx being the offset address from the current area
base address and nn being the assembled instructions and data in
byte format.
3.6.7 R Line
R 0 0 nn nn n1 n2 xx xx ...
The R line provides the relocation information to the linker.
The nn nn value is the current area index, i.e. which area the
current values were assembled. Relocation information is en-
coded in groups of 4 bytes:
1. n1 is the relocation mode and object format, for the
adhoc extension modes refer to asxxxx.h or aslink.h
1. bit 0 word(0x00)/byte(0x01)
2. bit 1 relocatable area(0x00)/symbol(0x02)
3. bit 2 normal(0x00)/PC relative(0x04) relocation
4. bit 3 1-byte(0x00)/2-byte(0x08) object format
5. bit 4 signed(0x00)/unsigned(0x10) byte data
6. bit 5 normal(0x00)/page '0'(0x20) reference
7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
8. bit 7 LSB byte(0x00)/MSB byte(0x80)
2. n2 is a byte index into the corresponding (i.e. pre-
ceding) T line data (i.e. a pointer to the data to be
updated by the relocation). The T line data may be
1-byte or 2-byte byte data format or 2-byte word
format.
3. xx xx is the area/symbol index for the area/symbol be-
ing referenced. the corresponding area/symbol is found
in the header area/symbol lists.
The groups of 4 bytes are repeated for each item requiring relo-
cation in the preceding T line.
THE LINKER PAGE 3-22
ASXXXX VERSION 3.XX LINKING
3.6.8 P Line
P 0 0 nn nn n1 n2 xx xx
The P line provides the paging information to the linker as
specified by a .setdp directive. The format of the relocation
information is identical to that of the R line. The correspond-
ing T line has the following information:
T xx xx aa aa bb bb
Where aa aa is the area reference number which specifies the
selected page area and bb bb is the base address of the page.
bb bb will require relocation processing if the 'n1 n2 xx xx' is
specified in the P line. The linker will verify that the base
address is on a 256 byte boundary and that the page length of an
area defined with the PAG type is not larger than 256 bytes.
The linker defaults any direct page references to the first
area defined in the input REL file. All ASxxxx assemblers will
specify the _CODE area first, making this the default page area.
3.6.9 24-Bit and 32-Bit Addressing
When 24-bit or 32-bit addressing is specified in the file
format line [XDQ][HL][234] then the S and T Lines have modified
formats:
S name Defnnnnnn (24-bit)
S name Refnnnnnn (24-bit)
T xx xx xx nn nn nn nn nn ... (24-bit)
S name Defnnnnnnnn (32-bit)
S name Refnnnnnnnn (32-bit)
T xx xx xx xx nn nn nn nn nn ... (32-bit)
The multibyte formats for byte data replace the 2-byte form
for 16-bit data with 3-byte or 4-byte data for 24-bit or 32-bit
data respectively. The 2nd byte format (also named MSB) always
uses the second byte of the 2, 3, or 4-byte data.
THE LINKER PAGE 3-23
ASXXXX VERSION 3.XX LINKING
3.6.10 ASlink V3.xx Error Messages
The linker provides detailed error messages allowing the pro-
grammer to quickly find the errant code. As the linker com-
pletes pass 1 over the input file(s) it reports any page
boundary or page length errors as follows:
?ASlink-Warning-Paged Area PAGE0 Boundary Error
and/or
?ASlink-Warning-Paged Area PAGE0 Length Error
where PAGE0 is the paged area.
During Pass two the linker reads the T, R, and P lines per-
forming the necessary relocations and outputting the absolute
code. Various errors may be reported during this process
The P line processing can produce only one possible error:
?ASlink-Warning-Page Definition Boundary Error
file module pgarea pgoffset
PgDef t6809l t6809l PAGE0 0001
The error message specifies the file and module where the .setdp
direct was issued and indicates the page area and the page
offset value determined after relocation.
The R line processing produces various errors:
?ASlink-Warning-Byte PCR relocation error for symbol bra2
?ASlink-Warning-Unsigned Byte error for symbol two56
?ASlink-Warning-Page0 relocation error for symbol ltwo56
?ASlink-Warning-Page Mode relocation error for symbol two56
?ASlink-Warning-Page Mode relocation error
?ASlink-Warning-2K Page relocation error
?ASlink-Warning-512K Page relocation error
These error messages also specify the file, module, area, and
offset within the area of the code referencing (Refby) and de-
fining (Defin) the symbol:
?ASlink-Warning-Unsigned Byte error for symbol two56
file module area offset
Refby t6800l t6800l DIRECT 0015
Defin tconst tconst . .ABS. 0100
THE LINKER PAGE 3-24
ASXXXX VERSION 3.XX LINKING
If the symbol is defined in the same module as the reference the
linker is unable to report the symbol name. The assembler list-
ing file(s) should be examined at the offset from the specified
area to locate the offending code.
The errors are:
1. The byte PCR error is caused by exceeding the pc rela-
tive byte branch range.
2. The Unsigned byte error indicates an indexing value was
negative or larger than 255.
3. The Page0 error is generated if the direct page vari-
able is not in the page0 range of 0 to 255.
4. The page mode error is generated if the direct variable
is not within the current direct page (6809).
5. The 2K Page relocation error is generated if the
destination is not within the current 2K page (8051,
DS8xCxxx).
6. The 512K Page relocation error is generated if the
destination is not within the current 512K page
(DS80C390).
THE LINKER Page 3-25
HINT FILE FORMAT FOR RELOCATED LISTINGS
3.7 HINT FILE FORMAT FOR RELOCATED LISTINGS
The hint file is an ascii file containing information to help
the linker convert the listing file into a relocated listing
file. Each line in the .hlr file corresponds to a single line
in the listing file. The text line usually contains 3 or 4
parameters in the radix selected for the assembler as shown in
the following table:
Line Position: 123456789012
------------
Octal: 111 222 333
Decimal: 111 222 333
Hex: 11 22 33
Parameter 1 specifies the parameters listed in the line.
A bit is set for each listing option enabled during the
assembly of the line.
BIT 0 - LIST_ERR Error Code(s)
BIT 1 - LIST_LOC Location
BIT 2 - LIST_BIN Generated Binary Value(s)
BIT 3 - LIST_EQT Assembler Equate Value
BIT 4 - LIST_CYC Opcode Cycles
BIT 5 - LIST_LIN Line Numbers
BIT 6 - LIST_SRC Assembler Source Code
BIT 7 - HLR_NLST Listing Inhibited
Parameter 2 is the internal assembler listing mode
value specified for this line during the assembly process:
0 - NLIST No listing
1 - SLIST Source only
2 - ALIST Address only
3 - BLIST Address only with allocation
4 - CLIST Code
5 - ELIST Equate only
6 - ILIST IF conditional evaluation
Parameter 3 is the number of output bytes listed
for this line.
The 4th parameter is only output if an equate references a
value in a different area. The area name is output in the fol-
lowing format following the 3 parameters described above:
Line Position: 123456789012
------------
THE LINKER PAGE 3-26
HINT FILE FORMAT FOR RELOCATED LISTINGS
Area Name: equatearea
When the line number is present it is prepended to the 3 or 4
parameters described above. The line number is always in
decimal in the following format:
Line Position: 1234567
-------
Decimal: LLLLL
Thus the four formats (for each radix) that may be present in
a .hlr file are:
Line Position: 123456789012345678901234567890
------------------------------
11 22 33
11 22 33 equatearea
LLLLL 11 22 33
LLLLL 11 22 33 equatearea
The linker understands these formats without any user inter-
action.
If a hint file does not exist then the linker attempts to
convert the list file to a relocated list file using some basic
assumptions about the parameters listed in each line. The con-
version without a hint file requires at least these listing
parameters: LOC, BIN, MEB, and ME. The 'equate' values will
not be updated.
THE LINKER Page 3-27
INTEL HEX OUTPUT FORMAT
3.8 INTEL HEX OUTPUT FORMAT
Record Mark Field - This field signifies the start of a
record, and consists of an ascii colon
(:).
Record Length Field - This field consists of two ascii
characters which indicate the number of
data bytes in this record. The
characters are the result of converting
the number of bytes in binary to two
ascii characters, high digit first. An
End of File record contains two ascii
zeros in this field.
Load Address Field - This field consists of the four ascii
characters which result from converting
the binary value of the address in which
to begin loading this record. The order
is as follows:
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either four ascii zeros or the
program entry address. (Note: The use
of the end of file record to specify a
start address for a 16-Bit addresses is
not part of the official Intel specifi-
cation.)
Record Type Field - This field identifies the record type,
which is either 0 for data, 1 for an End
of File, or 5 for an Extended Start Ad-
dress record. It consists of two ascii
characters, with the high digit of the
record type first, followed by the low
digit of the record type.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the standard End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
THE LINKER PAGE 3-28
INTEL HEX OUTPUT FORMAT
address field, the record type field,
and the data field. This sum is then
negated (2's complement) and converted
to two ascii characters, high digit
first.
THE LINKER Page 3-29
MOTOROLA S1-S9 OUTPUT FORMAT
3.9 MOTOROLA S1-S9 OUTPUT FORMAT (16-BIT)
Record Type Field - This field signifies the start of a
record and identifies the record type as
follows:
Ascii S1 - Data Record
Ascii S9 - End of File Record
Record Length Field - This field specifies the record length
which includes the address, data, and
checksum fields. The 8 bit record
length value is converted to two ascii
characters, high digit first.
Load Address Field - This field consists of the four ascii
characters which result from converting
the binary value of the address in which
to begin loading this record. The order
is as follows:
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either four ascii zeros or the
program entry address.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, and the data field. This
sum is then complemented (1's comple-
ment) and converted to two ascii
characters, high digit first.
THE LINKER Page 3-30
MOTOROLA S2-S8 OUTPUT FORMAT
3.10 MOTOROLA S2-S8 OUTPUT FORMAT (24-BIT)
Record Type Field - This field signifies the start of a
record and identifies the record type as
follows:
Ascii S2 - Data Record
Ascii S8 - End of File Record
Record Length Field - This field specifies the record length
which includes the address, data, and
checksum fields. The 8 bit record
length value is converted to two ascii
characters, high digit first.
Load Address Field - This field consists of the six ascii
characters which result from converting
the binary value of the address in which
to begin loading this record. The order
is as follows:
High digit of 3rd byte of address.
Low digit of 3rd byte of address.
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either six ascii zeros or the
program entry address.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, and the data field. This
sum is then complemented (1's comple-
ment) and converted to two ascii
characters, high digit first.
THE LINKER Page 3-31
MOTOROLA S3-S7 OUTPUT FORMAT
3.11 MOTOROLA S3-S7 OUTPUT FORMAT (32-BIT)
Record Type Field - This field signifies the start of a
record and identifies the record type as
follows:
Ascii S3 - Data Record
Ascii S7 - End of File Record
Record Length Field - This field specifies the record length
which includes the address, data, and
checksum fields. The 8 bit record
length value is converted to two ascii
characters, high digit first.
Load Address Field - This field consists of the eight ascii
characters which result from converting
the binary value of the address in which
to begin loading this record. The order
is as follows:
High digit of 4th byte of address.
Low digit of 4th byte of address.
High digit of 3rd byte of address.
Low digit of 3rd byte of address.
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either eight ascii zeros or the
program entry address.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, and the data field. This
sum is then complemented (1's comple-
ment) and converted to two ascii
characters, high digit first.
THE LINKER Page 3-32
TANDY COLOR COMPUTER DISK BASIC BINARY FORMAT
3.12 TANDY COLOR COMPUTER DISK BASIC FORMAT
Record Preamble - This field is either $00 (for start of
new record) or $FF (for last record in
file).
Record Length Field - This field specifies the number of data
bytes which follows the address field.
The length is in binary MSB to LSB
order.
16-Bit Length - 2-bytes
24-Bit Length - 3-bytes
32-Bit Length - 4-bytes
Load Address Field - This field consists of the address where
the record will be loaded into memory.
The address is in binary MSB to LSB
order.
16-Bit Address - 2-bytes
24-Bit Address - 3-bytes
32-Bit Address - 4-bytes
Data Field - This field consists of the actual binary
data.
After the last code segment, a final record like the one
above is placed. In this final segment, the Record Preamble is
$FF, the Record Length Field is $0000 and the Load Address Field
is the execution address.
CHAPTER 4
BUILDING ASXXXX AND ASLINK
The assemblers and linker have been successfully compiled for
Linux, DOS, and various flavors of Windows using the Linux GCC,
the Cygwin environment, the DJGPP environment, and the graphical
user interfaces and command line environments of
MS Visual C++ V6.0, MS Visual Studio 2005, 2010, 2013, 2015,
2019 and 2022, Open Watcom V1.9, Symantec C/C++ V7.2, and
Turbo C 3.0.
Makefiles for Linux, Cygwin, DJGPP, project files and a
makefile for Turbo C and pseudo makefiles and project files for
VC6, VS2005, VS2010, VS2013, VS2015, VS2019, VS2022, Open
Watcom, and Symantec are available to build all the assemblers
and the linker.
Unpack the asxv5p50.zip file into an appropriate directory
using the utility appropriate to your environment. For DOS or
Windows the following command line will unpack the distribution
zip file:
pkunzip -d asxv5p50.zip
The distribution file has been packed with DOS style end of
lines (CR/LF), and UPPER CASE file names. The Linux make file
assumes all lower case directories and file names. For Linux
the unpacking utility you choose should have an option to force
all lower case directories / file names and convert the ascii
files to local format. On most systems the following command
should do the trick:
unzip -L -a asxv5p50.zip
Some systems may require a -LL option to force all lower case.
BUILDING ASXXXX AND ASLINK Page 4-2
The distribution will be unpacked into the base directory
'asxv5pxx' which will contain source directories for each sup-
ported processor (as6800, asz80, ...), the machine independent
source (asxxsrc), the linker source (linksrc), and the miscel-
laneous sources (asxxmisc). Other directories include the do-
cumentation (asxdoc), test file directory (asxtst), html
documentation (asxhtml), NoICE support files (noice), various
debug monitors that can be assembled with the ASxxxx assemblers
(asmasm), the project directory (project) which contains two ap-
plications, (PHS) uses the AS6809 assembler and (MFM) uses the
AS89LP assembler, and the packaging directory (zipper).
4.1 BUILDING ASXXXX AND ASLINK WITH LINUX
The Linux build directory is /asxv5pxx/asxmak/linux/build.
The makefile in this directory is compatible with the Linux GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
/asxv5pxx/asxmak/linux/exe and all the compiled object modules
from the /asxv5pxx/asxmak/linux/build directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
BUILDING ASXXXX AND ASLINK PAGE 4-3
BUILDING ASXXXX AND ASLINK WITH CYGWIN
4.2 BUILDING ASXXXX AND ASLINK WITH CYGWIN
The Cygwin build directory is \asxv5pxx\asxmak\cygwin\build.
The makefile in this directory is compatible with the Cygwin GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
\asxv5pxx\asxmak\cygwin\exe and all the compiled object modules
from the \asxv5pxx\asxmak\cygwin\build directory. The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP
The DJGPP build directory is \asxv5pxx\asxmak\djgpp\build.
The makefile in this directory is compatible with the DJGPP GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
\asxv5pxx\asxmak\djgpp\exe and all the compiled object modules
from the \asxv5pxx\asxmak\djgpp\build directory. The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
BUILDING ASXXXX AND ASLINK PAGE 4-4
BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
The Borland product is available in the Borland Turbo C++
Suite which contains C++ Builder 1.0, Turbo C++ 4.5 for Windows
and Turbo C++ 3.0 for DOS. The DOS IDE will install and run on
x86 (16 or 32 bit) versions of Windows (not x64 versions).
4.4.1 Graphical User Interface
Each ASxxxx Assembler has two project specific files
(*.dsk and *.prj) located in the subdirectory
\asxv5pxx\asxmak\turboc30\build. You must enter the .prj
filename into the Turbo C++ IDE: enter Options->Directories and
change the include and output directories to match your confi-
guration. After these changes have been made you will be able
to compile the selected project. These changes must be manually
entered for each project.
4.4.2 Command Line Interface
Before the command line interface can be used you must per-
form the steps outlined in the 'Graphical User Interface' in-
structions above for each project you wish to build.
Open a command prompt window in the
\asxv5pxx\asxmak\turboc30\build directory. Assuming the Turbo C
compiler has been installed in the default location (C:\TC) the
file _setpath.bat will set the PATH variable. If this is not
the case then the line
PATH=C:\TC;C:\TC\BIN;C:\TC\INCLUDE
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\turboc30\build\ directory and the executable
files will be placed in the \asxv5pxx\asxmak\turboc30\exe direc-
tory.
The command
make all
BUILDING ASXXXX AND ASLINK PAGE 4-5
BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The Turbo C make utility uses the information in the correspond-
ing .prj and .dsk files to compile and link the programs.
The file _makeall.bat found in the directory can also be used
to invoke the Turbo C command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
directories in the environment variable PATH and then invokes
'make all'.
4.5 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
4.5.1 Graphical User Interface
Each ASxxxx Assembler has a VC6 project file (*.dsw) located
in a subdirectory of \asxv5pxx\asxmak\vc6\build. Simply enter
this project filename into the VC6 IDE and build/rebuild the as-
sembler.
4.5.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vc6\build directory. The file make.bat found
in the directory can be used to invoke the VC6 command line com-
piler. The make.bat file assumes that the Visual C++ compiler
has been installed in the default location. If this is not the
case then the line
SET MS$DEV="C:\Program Files\Microsoft Visual Studio\
Common\MSDev98\Bin\msdev.exe"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vc6\build\as----\release directory and the exe-
cutable files will be placed in the \asxv5pxx\asxmak\vc6\exe
directory.
BUILDING ASXXXX AND ASLINK PAGE 4-6
BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VC6 command line compiler uses the information in the cor-
responding .dsw/.dsp files to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.6 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
4.6.1 Graphical User Interface
Each ASxxxx Assembler has a VS2005 project file (*.vcproj)
located in a subdirectory of \asxv5pxx\asxmak\vs05\build. Sim-
ply enter this project filename into the VS2005 IDE and
build/rebuild the assembler.
4.6.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs05\build directory. The file make.bat found
in the directory can be used to invoke the VS2005 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
SET VC$BUILD="C:\Program Files\Microsoft Visual Studio 8\
Common\MSDev98\Bin\msdev.exe"
must be changed to match your environment. The compiled object
BUILDING ASXXXX AND ASLINK PAGE 4-7
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
code modules will be placed in the
\asxv5pxx\asxmak\vs05\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs05\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VS2005 command line compiler uses the information in the
corresponding .vcproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.7 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
4.7.1 Graphical User Interface
Each ASxxxx Assembler has a VS2010 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs10\build. Sim-
ply enter this project filename into the VS2010 IDE and
build/rebuild the assembler.
BUILDING ASXXXX AND ASLINK PAGE 4-8
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
4.7.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs10\build directory. The file make.bat found
in the directory can be used to invoke the VS2010 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
call "c:\Program Files (x86)\Microsoft Visual Studio 10.0\
VC\bin\vcvars32.bat"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs10\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs10\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VS2010 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
BUILDING ASXXXX AND ASLINK PAGE 4-9
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2013
4.8 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2013
4.8.1 Graphical User Interface
Each ASxxxx Assembler has a VS2013 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs13\build. Sim-
ply enter this project filename into the VS2013 IDE and
build/rebuild the assembler.
4.8.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs13\build directory. The file make.bat found
in the directory can be used to invoke the VS2013 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
call "c:\Program Files (x86)\Microsoft Visual Studio 12.0\
VC\bin\vcvars32.bat"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs13\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs13\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VS2013 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
BUILDING ASXXXX AND ASLINK PAGE 4-10
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2013
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.9 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2015
4.9.1 Graphical User Interface
Each ASxxxx Assembler has a VS2015 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs15\build. Sim-
ply enter this project filename into the VS2015 IDE and
build/rebuild the assembler.
4.9.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs15\build directory. The file make.bat found
in the directory can be used to invoke the VS2015 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
call "c:\Program Files (x86)\Microsoft Visual Studio 14.0\
VC\bin\vcvars32.bat"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs15\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs15\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
BUILDING ASXXXX AND ASLINK PAGE 4-11
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2015
The VS2015 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.10 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2019
4.10.1 Graphical User Interface
Each ASxxxx Assembler has a VS2019 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs19\build. Sim-
ply enter this project filename into the VS2019 IDE and
build/rebuild the assembler.
4.10.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs19\build directory. The file make.bat found
in the directory can be used to invoke the VS2019 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the lines
SET MSBUILD="C:\Program Files (x86)\Microsoft Visual Studio
\2019\Community\MSBuild\Current\MSBuild.exe"
and
call "C:\Program Files (x86)\Microsoft Visual Studio
\2019\Community\VC\Auxiliary\Build\vcvars32.bat"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs19\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs19\exe
directory.
BUILDING ASXXXX AND ASLINK PAGE 4-12
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2019
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VS2019 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.11 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2022
4.11.1 Graphical User Interface
Each ASxxxx Assembler has a VS2022 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs22\build. Sim-
ply enter this project filename into the VS2022 IDE and
build/rebuild the assembler.
4.11.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs22\build directory. The file make.bat found
in the directory can be used to invoke the VS2022 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the lines
SET MSBUILD="C:\Program Files\Microsoft Visual Studio
\2022\Community\MSBuild\Current\bin\MSBuild.exe"
and
call "C:\Program Files\Microsoft Visual Studio
\2022\Community\VC\Auxiliary\Build\vcvars32.bat"
BUILDING ASXXXX AND ASLINK PAGE 4-13
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2022
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs22\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs22\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The VS2022 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.12 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
4.12.1 Graphical User Interface
Each ASxxxx Assembler has a set of project files (.prj, .tgt,
.mk, .mk1, and .lk1) located in the subdirectory
\asxv5pxx\asxmak\watcom\build. You will have to edit the pro-
ject files to match your local file locations.
BUILDING ASXXXX AND ASLINK PAGE 4-14
BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
4.12.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\watcom\build directory. Assuming the Watcom
compiler has been installed in the default location (C:\WATCOM)
the file _setpath.bat will set the PATH variable. If this is
not the case then the line
PATH=C:\WATCOM\BINNT;C:\WATCOM\BINW
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\watcom\build\ directory and the executable
files will be placed in the \asxv5pxx\asxmak\watcom\exe direc-
tory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The Watcom command line compiler wmake.exe uses the information
in the corresponding project files to compile and link the pro-
grams.
The file _makeall.bat found in the directory can also be used
to invoke the Watcom command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
directories in the environment variable PATH and then invokes
'make all'.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
BUILDING ASXXXX AND ASLINK PAGE 4-15
BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
4.13 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
The Symantec product is no longer available but is included
for historical reasons (the final version, 7.5, was introduced
in 1996). The product had an excellent graphical user inter-
face, built in editor, project manager, and supported DOS, Ex-
tended DOS (the executable contained a built in DOS extender
which was rendered unusable in Windows 2000, after service pack
2, or in Windows XP), Win95, and Windows NT.
4.13.1 Graphical User Interface
Each ASxxxx Assembler has a series of project specific files
(*.bro, *.def, *.dpd, *.lnk, *.mak, *.opn, and *.prj) located in
in the subdirectory \asxv5pxx\asxmak\symantec\build. You must
enter the .prj filename into the Symantec IDE and then select
Project->Settings->Directories and change the include, target,
and compiler output directories to match your configuration.
After these changes have been made you will be able to compile
the selected project. These changes must be manually entered
for each project.
4.13.2 Command Line Interface
Before the command line interface can be used you must per-
form the steps outlined in the 'Graphical User Interface' in-
structions above for each project you wish to build.
Open a command prompt window in the
\asxv5pxx\asxmak\symantec\build directory. The file make.bat
found in the directory can be used to invoke the Symantec com-
mand line compiler. The make.bat file assumes that the path to
the compiler directories has been set in the environment vari-
able PATH. Assuming the Symantec compiler has been installed in
the default location (C:\SC) the file _setpath.bat will set the
PATH variable. If this is not the case then the line
PATH=C:\SC;C:\SC\BIN;C:\SC\INCLUDE;C:\SC\LIB
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\symantec\build directory and the executable
files will be placed in the \asxv5pxx\asxmak\symantec\exe direc-
tory.
BUILDING ASXXXX AND ASLINK PAGE 4-16
BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn, asxcnv, and s19os9. The
make file can make a single program by invoking make with the
specific assembler, linker, or utility you wish to build:
make aslink
The Symantec make utility , smake.exe, uses the information in
the corresponding .mak files to compile and link the programs.
The file _makeall.bat found in the directory can also be used
to invoke the Symantec command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
directories in the environment variable PATH and then invokes
'make all'.
4.14 THE _CLEAN.BAT AND _PREP.BAT FILES
Each of the build directories have two maintenance files:
_prep.bat and _clean.bat. The command file _prep.bat prepares
the particular compiler directories for distribution by removing
all exteraneous files but keeping the final compiled execut-
ables. The _clean.bat command file performs the same function
as _prep.bat and removes the compiled executables.
4.15 THE PRECOMPILED ASXXXX EXECUTABLES
The downloadable executables have restrictions determined by
the compiler and the end point operating system.
The following table can be used to select a specific set of
executables based on your operating system and bitness.
BUILDING ASXXXX AND ASLINK PAGE 4-17
THE PRECOMPILED ASXXXX EXECUTABLES
Windows 2003
Win7-10 Win7-8 Windows XP DOS
[64-Bit] [32 Bit] [32 Bit] [16 Bit]
--- --- --- ---
cygwin * * *
djgpp * *
symantec * *
turboc30 * * *
vc6 * * *
vs05 * * *
vs10 * * *
vs13 * *
vs15 * *
vs19 * *
vs22 * *
watcom * *
(The DJGPP, Symantec, and Watcom compilers
can create DOS compatible executables.)
The linux executables are 64 bit and by default the bitness
of the system on which they were compiled. To compile 32 bit
executables on a 64 bit system edit the makefile to include the
-m32 option as follows:
CCOPT= -O3 -m32
and
LDOPT= -m32
and recompile the assemblers and linker.
APPENDIX A
ASXSCN LISTING FILE SCANNER
The program ASXSCN is a debugging utility program used to
verify ASxxxx assembler code generation. The program may be in-
voked with any of the following options:
Usage: [-dqx234i] file
d decimal listing
q octal listing
x hex listing (default)
2 16-Bit address (default)
3 24-Bit address
4 32-Bit address
i ignore relocation flags
c comment starts at last ';'
Select one of the -d, -q, or -x options to match the listing
file format and select only one of the -2, -3, or -4 options to
match the addressing range of the listing file. The -i option
inhibits the verification of the assembler relocation flags
generated by the ASxxxx assemblers -f or -ff options.
Each source assembly line selected for verification must in-
clude the expected output code in the comment field of the line.
The default expects verification code to follow the first ';'
encountered in the line. Use the -c option to specify that the
verification code follows the last ';' on the line. The follow-
ing has been extracted from the ASF2MC8 test file tf2mc8.asm:
reti ; 30
call ext ; 31s12r34
subc a ; 32
subcw a ; 33
subc a,#v22 ; 34r22
subc a,*dir ; 35*33
ASXSCN LISTING FILE SCANNER Page A-2
subc a,@ix+off ; 36r44
subc a,@ep ; 37
The r, s, and * are specific address relocation flags created
when the -ff option is specified with any ASxxxx assembler.
Invoking the assembler:
asf2mc8 -gloaxff tf2mc8
produces a listing file:
033B 30 677 reti ; 30
033C 31s12r34 678 call ext ; 31s12r34
033F 32 679 subc a ; 32
0340 33 680 subcw a ; 33
0341 34r22 681 subc a,#v22 ; 34r22
0343 35*33 682 subc a,*dir ; 35*33
0345 36r44 683 subc a,@ix+off ; 36r44
0347 37 684 subc a,@ep ; 37
The expected code can be compared with the generated code by
invoking the scanning program:
asxscn tf2mc8.lst
0 code difference(s) found in file tf2mc8.lst
The assembled code can also be linked:
aslink -u ...options... t2fc8
to create an updated listing file:
033B 30 677 reti ; 30
033C 31 12 34 678 call ext ; 31s12r34
033F 32 679 subc a ; 32
0340 33 680 subcw a ; 33
0341 34 22 681 subc a,#v22 ; 34r22
0343 35 33 682 subc a,*dir ; 35*33
0345 36 44 683 subc a,@ix+off ; 36r44
which resolves all relocations and removes the relocation flags.
This file can also be verified:
asxscn -i tf2mc8.rst
0 code difference(s) found in file tf2mc8.rst
ASXSCN LISTING FILE SCANNER Page A-3
The verification of both the .lst and .rst files from the
same assembler test file requires careful definition of external
variables so that the assembler listing file and the linker
listing file have the same code values.
APPENDIX B
ASXCNV LISTING CONVERTER
The program ASXCNV is a debugging utility program used to
create an assembler file with verification data. The program
may be invoked with any of the following options:
Usage: [-dqx234n#] file
d decimal listing
q octal listing
x hex listing (default)
2 16-Bit address (default)
3 24-Bit address
4 32-Bit address
n# cycle digits (2-4) (default = 2)
Select one of the -d, -q, or -x options to match the listing
file format, select only one of the -2, -3, or -4 options to
match the addressing range of the listing file, and use -n#,
where # is 2,3, or 4, to specify the number of cycle digits.
The defaults are hex listing, 16-Bit addressing, and 2 cycle di-
gits.
Each source assembly line which creates output data will have
the data appended to the source line as a comment. The appended
comment will contain the relocation codes if they are present in
the listing file. Any existing comment on the line will be
overwritten.
Given an existing listing file, a.lst, containing:
033B 30 677 reti
033C 31s12r34 678 call ext
033F 32 679 subc a
0340 33 680 subcw a
0341 34r22 681 subc a,#v22
ASXCNV LISTING CONVERTER Page B-2
0343 35*33 682 subc a,*dir
0345 36r44 683 subc a,@ix+off
0347 37 684 subc a,@ep
A converted listing file can be created using the following
command:
asxcnv -d2 a.lst
The created output file, a.out, is a new assembly file now con-
tain the verification data in the comments:
reti ; 30
call ext ; 31s12r34
subc a ; 32
subcw a ; 33
subc a,#v22 ; 34r22
subc a,*dir ; 35*33
subc a,@ix+off ; 36r44
subc a,@ep ; 37
APPENDIX C
S19OS9 CONVERSION UTILITY
C.1 BACKGROUND
OS9 is an Operating System for the TRS-80/Tandy Color Com-
puters based on the 6809/6309 processors. The open source ver-
sion of the OS9 operating system is NitrOS-9 and is available
at:
The NitrOS-9 Project
http://www.nitros9.org
The s19os9 utility package contains the following:
1) OS9 definition files and an OS9 assembler module
which creates the OS9 header, code and data areas,
and the module CRC block:
os9_mod.def OS9 Module Definitions
os9_sys.def OS9 Sytem Definitions
os9_mod.asm OS9 Module Begin / End Code
2) a program, s19os9, to post-process assembled OS9
modules from S19 format into binary OS9 modules
with the appropriate header checksum and module
CRC values calculated.
The file os9_mod.def contains module definitions used in the
header of OS9 binary files and was derived from the NitrOS-9
file os9_mod.def.
S19OS9 CONVERSION UTILITY PAGE C-2
BACKGROUND
The file os9_sys.def contains system definitions pertaining
to system service request codes, system reserved calls, I/O ser-
vice request calls, file access modes, signal codes, get/put
status codes, module offsets, and error codes. This file was
derived from the NitrOS-9 file os9defs.a.
C.2 CREATING AN OS9 MODULE
This section describes how to create an OS9 module using the
files os9_mod.def, os9_sys.def, and os9_mod.asm.
When creating an OS9 module certain parameters are required
by the os9_mod.asm file to create the appropriate headers. The
list of supported parameters is listed here:
Basic Header:
.define OS9_ModNam, "Module_Name"
.define OS9_Typ, "Type_Value"
.define OS9_Lng, "Language_Value"
.define OS9_Att, "Attributes_Value"
.define OS9_Rev, "Revision_Value"
General Parameters:
.define OS9_ModExe, "Module Entry Point Offset"
.define OS9_ModMem, "Module Permanent Storage"
Device Driver Parameters:
.define OS9_Mod, "Module Mode"
Descriptor Parameters:
.define OS9_FMN, "Device Driver Name Label"
.define OS9_DDR, "Device Driver Name Label"
.define OS9_AbsAdr02, "Device Absolute Address <23:16>"
.define OS9_AbsAdr01, "Device Absolute Address <15:08>"
.define OS9_AbsAdr00, "Device Absolute Address <07:00>"
.define OS9_Opt, "Descriptor Option"
.define OS9_DType, "Descriptor Data Type"
The OS9 Module file os9_mod.asm supports the creation of the
following simple module types:
SYSTM - System Module
PRGRM - Program Module
S19OS9 CONVERSION UTILITY PAGE C-3
CREATING AN OS9 MODULE
SBTRN - Subroutine Module
DRIVR - Device Driver Module
FLMGR - File Manager Module
DEVIC - Device Descriptor Module
The following code shows the steps required when creating an
OS9 program using the os9_mod.asm file. os9_mod.asm loads the
os9_mod.def and os9_sys.def files, defines the software inter-
rupt macro os9, and creates the os9 program header and crc
blocks.
C.2.1 Step 1: Define Header Values
;****
; Step 1:
; Use the .define assembler directive
; to insert the parameters into the
; os9_mod.asm's header structure.
;
; Note: See the file os9_mod.asm for
; parameter names and definitions.
;
.title List Program
.sbttl Header Definitions
.define OS9_ModNam, "LSTNAM"
.define OS9_Typ, "PRGRM"
.define OS9_Lng, "OBJCT"
.define OS9_Att, "REENT"
.define OS9_Rev, "1"
.define OS9_ModExe, "LSTENT"
.define OS9_ModMem, "LSTMEM"
C.2.2 Step 2: Create The Module Header
; Step 2:
; Set the symbol OS9_Module equal to 1
; and .include the file os9_mod.asm.
OS9_Module = 1 ; OS9 Module Begin (==1)
; .include "os9_mod.asm"
.nlist
.include "os9_mod.asm"
.list
S19OS9 CONVERSION UTILITY PAGE C-4
CREATING AN OS9 MODULE
With OS9_Module = 1 the following code is inserted into the
code stream:
.define os9, "swi2 .byte" ; os9 macro
; Include OS9 Definition Files
; os9_sys.def Listing Disabled
.nlist
.include "os9_sys.def"
.list
; os9_mod.def Listing Disabled
.nlist
.include "os9_mod.def"
.list
; Define The OS9 Module Bank and Areas.
;
; Place the module program code in area OS9_Module
; and the module data in area OS9_Data.
;
.bank OS9_Module (BASE=0,FSFX=_OS9)
.area OS9_Module (REL,CON,BANK=OS9_Module)
.bank OS9_Data (BASE=0,FSFX=_DAT)
.area OS9_Data (REL,CON,BANK=OS9_Data)
.area OS9_Module
OS9_ModBgn = .
.byte OS9_ID0, OS9_ID1
; OS9 Module Sync Bytes
.word OS9_ModEnd - OS9_ModBgn
; Length (Includes 3 CRC Bytes)
.word OS9_ModNam - OS9_ModBgn
; Offset to Module Name String
.byte OS9_Typ | OS9_Lng
; Type / Language
.byte OS9_Att | OS9_Rev
; Attributes / Revision
.byte 0xFF
; Header Parity
.word OS9_ModExe - OS9_ModBgn
; Execution Entry Offset
S19OS9 CONVERSION UTILITY PAGE C-5
CREATING AN OS9 MODULE
.word OS9_ModMem
; Storage Requirement
; OS9_ModData
; Module Data
C.2.3 Step 3: Allocate Storage
The next step is to add the program data storage space for
the program. Note that the space is only allocated here and no
initialization is done.
;*****-----*****-----*****-----*****-----*****-----*****
; LIST UTILITY COMMAND
; Syntax: list
; COPIES INPUT FROM SPECIFIED FILE TO STANDARD OUTPUT
; Step 3:
; Allocate the storage in .area OS9_Data
.area OS9_Data
; STATIC STORAGE OFFSETS
BUFSIZ .equ 200 ; size of input buffer
Base = .
IPATH = . - Base
.rmb 1 ; input path number
PRMPTR = . - Base
.rmb 2 ; parameter pointer
BUFFER = . - Base
.rmb BUFSIZ ; allocate line buffer
.rmb 200 ; allocate stack
.rmb 200 ; room for parameter list
LSTMEM = . - Base
S19OS9 CONVERSION UTILITY PAGE C-6
CREATING AN OS9 MODULE
C.2.4 Step 4: Insert The Program Code
Once the data storage space has been allocated then the pro-
gram code is added to .area OS9_Module:
; Step 4:
; Insert the Module Code into .area OS9_Module
.area OS9_Module
LSTNAM: .strs "List" ; String with last byte
; or'd with 0x80
LSTENT: stx *PRMPTR ; save parameter ptr
lda #READ. ; select read access mode
os9 I$OPEN ; open input file
bcs LIST50 ; exit if error
sta *IPATH ; save input path number
stx *PRMPTR ; save updated param ptr
LIST20: lda *IPATH ; load input path number
leax *BUFFER,U ; load buffer pointer
ldy #BUFSIZ ; maximum bytes to read
os9 I$READLN ; read line of input
bcs LIST30 ; exit if error
lda #1 ; load std. out. path #
os9 I$WRITLN ; output line
bcc LIST20 ; Repeat if no error
bra LIST50 ; exit if error
LIST30: cmpb #E$EOF ; at end of file?
bne LIST50 ; branch if not
lda *IPATH ; load input path number
os9 I$CLOSE ; close input path
bcs LIST50 ; ..exit if error
ldx *PRMPTR ; restore parameter ptr
lda ,X
cmpa #0x0D ; End of parameter line?
bne LSTENT ; ..no, list next file
clrb
LIST50: os9 F$EXIT ; ... terminate
S19OS9 CONVERSION UTILITY PAGE C-7
CREATING AN OS9 MODULE
C.2.5 Step 5: End Assembly By Inserting CRC
; Step 5:
; Set the symbol OS9_Module equal to 0
; and .include the file os9_mod.asm.
OS9_Module = 0 ; OS9 Module End (==0)
; .include "os9_mod.asm"
.nlist
.include "os9_mod.asm"
.list
.end
With OS9_Module = 0 the following code is the last code in-
serted into the code stream:
.area OS9_Module
; The 3-Byte Module CRC
.byte OS9_CRC0, OS9_CRC1, OS9_CRC2
OS9_ModEnd = . ; End of OS9 Module
C.3 THE CONVERSION UTILITY: S19OS9
Once you have assembled your module into an .S19 file use the
program s19os9 to create the binary OS9 module file.
The program s19os9 is invoked from the command line:
s19os9 mod.s19 -o mod.bin
where mod.s19 is the input S19 file and mod.bin is the OS9
binary output file.
The conversion utility s19os9 reads the .S19 file into an in-
ternal buffer (48K bytes maximum). As each line is read from
the .S19 file the record length, address, data, and checksum
values are processed checking for invalid characters and a valid
checksum.
After the .S19 file has been loaded into the internal buffer
the OS9 module is checked for correct length, and the OS9 Module
ID, OS9 Initial Header Checksum, and OS9 Initial Module CRC are
S19OS9 CONVERSION UTILITY PAGE C-8
THE CONVERSION UTILITY: S19OS9
verified. After these parameters have been checked then the ac-
tual header checksum and module CRC values are calculated and
replace the Initial Module Checksum and CRC values. The final-
ized module is then written to the file mod.bin.
APPENDIX D
RELEASE NOTES
ASxxxx/ASlink version 5.50 is
considered a major release version.
M A J O R C H A N G E S
THE ASSEMBLERS
The assembler command argument structure has changed. Previ-
ous versions specified that the first file of a multifile argu-
ment was the output file. This has been changed:
THE OUTPUT FILE HAS THE NAME OF THE FIRST INPUT FILE
The output file name and/or extension can be changed by using
the -o+ naming option. When the object file extension is
changed from the default .rel then the linker input file must
explicitly specify the extension.
Additional 'Pass 2' scans to resolve mutilevel forward refer-
ences are available using the -n option.
The temporary hex radix prefix '$$' has been changed to '$@'.
The decimal point, '.', following decimal digits is now con-
sidered a temporary decimal radix.
The string ascii, ascis, and asciz directives can now include
byte values.
RELEASE NOTES Page D-2
The following new assembler directives have been added:
.psharea save and restore area contexts
.poparea to/from a 16 element stack
.trace trace insert, include, assembler
.ntrace files, macros, and repeat macros
.dl and .long create 4-byte values
.blkl allocate 4-byte blocks
(only in specific assemblers)
THE LINKER
The linker command argument structure has changed. Previous
versions specified that the first file of a multifile argument
was the output file. This has been changed:
THE OUTPUT FILE HAS THE NAME OF THE FIRST INPUT FILE
The output hex format now uses the generally accepted format
for Intel Hex. In addition, the default output file name and/or
extension for the Intel, Motorola, or Tandy linked code can be
changed with the extended -i+/-s+/-t+ renaming options.
The previous linker command line -b option, set base address
of area, has been changed to the -a option.
The redefined command line option -b now sets the base ad-
dress of a bank.
Given:
.area A (bank=BankA)
.bank BankA (base=0x100)
.area B (bank=BankB)
.bank BankB (base=0x200)
Then:
-a A=0x1000
sets the start address of area A to 0x1000
(this overrides any bank calculated address)
-b BankB=0x4000
sets the start address of BankB to 0x4000
(this overrides any defined base address)
RELEASE NOTES Page D-3
Version 5.5 consolidates all the updates since version 5.4
which includes the addition of nine assemblers:
AS4040 (supports the 4004)
AS68CF (ColdFire)
AS68K (68000, 68008, 68010, and 68020)
ASCOP4
ASCOP8
ASEZ8
ASPDP11 (with EIS, FIS, FPP, and CIS)
ASRS08 (reduced version of the HCS08)
ASSX
A much updated ASGB assembler is now more compatible with the
instruction syntax found in the SDCC Gameboy assembler.
The internals of the AS6500 assembler have been updated to
use core functionality unavailable when the assembler was
originally written.
2022_01_17 Version 5.40 Update 5
UPDATE_02, UPDATE_03, AND UPDATE_04
MUST BE INSTALLED BEFORE INSTALLING THIS UPDATE.
An update is performed by merging the update directories
with the asxv5pxx directories. New files will be added
and changed files will be replaced.
1) Addressing mode errors fixed in the
AS78K0 and AS78K0S assemblers.
2) Test files for the AS78K0 and AS78K0S
assemblers are updated.
You must recompile the AS78K0 and AS78K0S
assemblers to incorporate the update.
2021_12_16 Version 5.40 Update 4
This update brings the assembler and linker to version 5.44
There is NO version 5.43
RELEASE NOTES Page D-4
UPDATE_02 MUST BE INSTALLED AND
UPDATE_03 MUST BE INSTALLED BEFORE INSTALLING THIS UPDATE.
An update is performed by merging the update directories
with the asxv5pxx directories. New files will be added
and changed files will be replaced.
1) New Assembler: ASRS08 supports the Freescale/NXP
RS08 series of microprocessors.
2) Updates to build files.
3) Documentation updated.
You must recompile the ASxxxx Assemblers and Linker
to incorporate the update.xxx
2021_10_25 Version 5.40 Update 3
This update brings the assembler and linker to version 5.42
UPDATE_02 MUST BE INSTALLED BEFORE INSTALLING THIS UPDATE.
2) Assembler and Linker errors are now reported in a
more consistent manner.
2) Assembler and Linker exit codes have been updated.
3) Corrected the handling of the -h option in aslink.
4) Fix the ascop8 test file tcop8.asm
5) Miscellaneous build and cleanup file corrections
Assembler and Linker files modified:
assemblers:
asdata.c, asmain.c, asout.c, assym.c, and asxxxx.h
aslink:
lkarea.c, lkbank.c, kkeval.c, lkhead.c, lklex.c, lklibr.c,
lkmain.c, lkroc.c, lkrloc3.c, lkrloc4.c, lksym.c, and
aslink.h
You must recompile the ASxxxx Assemblers and Linker
to incorporate the update.xxx
RELEASE NOTES Page D-5
2021_09_01 Version 5.40 Update 2
This update brings the assembler and linker to version 5.41
Includes: 2021_05_11 Version 5.40 Update 1
and the following:
assemblers:
asmain - 'cnt' variable changed to 'a_uint' type.
asxxxx.h - Version 5.41
aslink:
lklist.c - linking errors now reported in .rst file
lkrloc4.c - corrected problem in reported error location
lkrloc3.c - "
aslink.h - Version 5.41
as8x300:
s8xmch.c - line 351 changed to
if ((v2 == 0x07) | (v2 == 0x0F)) {
New Assemblers:
as4040 - Intel 4040 and 4004
ascop4 - National Semiconductor COP400 Series Of
Microprocessors
ascop8 - National Semiconductor COP800 Series Of
Microprocessors
Updates to build/make files, assembler test files, and do-
cumentation.
2021_05_11 Version 5.40 Update 1
AS78K0 and AS78K0S -
Instructions CMP, XOR, AND, OR, ADD, SUB, ADDC, SUBC, and XCH
with register to register operations of the form Rn,Rn
failed to report an error if one of the arguments was not A.
Instruction MOVW with an addressing mode of SADDRP failed to
report an ODD address as an error.
Note: An externally defined SADDRP address which is ODD
will not be reported as an error by the assembler
or the linker.
RELEASE NOTES Page D-6
Asxxxx/ASlink version 5.40 is
considered a major release version.
March 2021 Version 5.40
(1) Added a new assembler:
AS89LP, which supports the AT89LP series of
advanced 8051 clones with extensions.
SFR files and a Macro Library are included.
(2) A rewrite of the AS6816 assembler to provide
full 20 bit addressing and fixes to the code
generation.
(3) ASZ80 assembler has been updated to support the
8085 and 8080 using the Z80 syntax.
(4) AS8085 assembler has been updated to support
the 8080.
(5) Assemblers flagging <# and ># as syntax errors
have been fixed to be equivalent to #< and #>.
(6) Added the .incbin directive to allow verbatim
inclusion of a byte stream.
(7) Added extended error reporting to all assemblers
for most , , and errors.
(8) Fixed bug in macro processor related to
missing or malformed arguments.
(9) Update sections of code using strncpy() giving
errors when compiled with GCC 10.2.0 (no other
compiler flagged this code with an error).
2019_03_10 Version 5.30 Update 1
This update for Version 5.30 of the ASxxxx Cross
Assemblers includes fixes for the following errors:
(1) The as78k0 assembler had numerous register
'H' and 'L' errors which have been corrected.
(2) The linker reported the wrong version and has
been corrected.
RELEASE NOTES Page D-7
January 2019 Version 5.3
(1) Added new assemblers:
as78k0, as8008, as8008s, as8x300, and asz280
(2) General assembler updates
added -i to insert assember lines before input files
fixed .macro listing options
fixes related to errors and the -bb option
fix the escape processing of the '\' character
.include file location illustrations
(3) General linker updates
fix library path file strings
rewrite of .lst to .rst translation
(4) Assembler specific fixes
as740
changed 2-byte code to 1-byte code definition
as8048
Corrected bug in "sel" instruction in .8041 mode.
asf2mc
Corrected documentation for asf2mc processor types.
aspic
Fixed missing machine type variable definition
Fixed 'tris' instruction
asst8
Included add/addw/sub/subw sp,#byte modes.
Added the int opcode. Cleaned up st8addr.c
addressing mode comments and code.
January 2017 Version 5.20
(1) Completed the functionality for propagating
the boundary specifications .odd, .even, and
.bndry processed during assembly to the linker.
(2) Restored the correct functionality of the
.org directive in areas of REL type.
(3) Added Intel Hex legacy start address record
type 1 as an option.
RELEASE NOTES Page D-8
Summary of changes/additions to the ASxxxx Assemblers from Ver-
sion 5.11 to Version 4.11.
2015_06_27 Version 5.10 Update 1
This update for Version 5.10 of the ASxxxx Cross
Assemblers includes fixes for the following errors:
(1) The as6500 assembler incorrectly assembled
cpx # and cpy # instructions.
(2) An error in asmain.c inhibited the listing of
all .if.. assembly directives.
2014_10_31 Version 5.10
(1) Rewrite of listing to relocated listing translation
code in the assembler and the linker base code.
The Assemblers now create a .lst to .rst hint file
with the extension .hlr (when both .lst and .rel
files are created by the assembler).
(2) Add as6100 assembler (Intersil IM6100 / Harris HM6100)
(3) Add as78k0s assembler (Renesas/NEC 78K/0S)
2013_05_12 Version 5.00 Update 6
This update for Version 5.00 of the ASxxxx Cross
Assemblers rolls up updates 1, 2, 3, 4, and 5 with fixes
for the following:
(1) Fix asscmp assembler (pre-increment on fetch).
(2) Fix aslink error reporting for PC relative modes.
2012_08_01 Version 5.00 Update 5
RELEASE NOTES Page D-9
Update_05 for the ASxxxx Assembler and Linker Version 5.00
(use 'pkunzip -d u05500.zip' for extraction with MS-DOS)
(use 'unzip -L -a u05500.zip' for extraction with Linux)
See the note about merging
this update with the
asxv5pxx distribution.
This update for Version 5.00 of the ASxxxx Cross
Assemblers rolls up updates 1, 2, 3, and 4 with the addition of
a new assembler and fixes:
(1) A new cross assembler for the Fairchild
F8 microprocessor (or Mostek 3870).
(2) Minor syntactical changes for ANSI C compatibility,
fix type conversion warnings, and update the
various build, make, and test files.
Update 4 Items
(1) The AS8048 base opcode value for the JMPP
instruction should be B3 and NOT 83.
(2) The AS8051 assembler calculates incorrect
offsets when using the program counter, ".",
as a destination in the instructions having
a PC-Relative addressing mode. These
instructions include: jbc, jb, jbn, jc,
jnc, jz, jnz, cjne, and djnz.
Update 3 Items
(1) A new cross assembler for the Fairchild
F8 microprocessor (or Mostek 3870).
(2) Minor syntactical changes for ANSI C compatibility,
fix type conversion warnings, and update the
various build, make, and test files.
(3) New cross assemblers for STMicroelectronics
ST6, ST7, and STM8 microprocessors.
(4) An ASlink list file update error fix (-u option)
causing some errors not to be inserted into the
created .rst file.
RELEASE NOTES Page D-10
(5) An additional ASxxxx assembler option (-v) which
enables checking for out of range signed / unsigned
values in symbol equates and arithmetic operations.
This option has some ambiguities as internally the
assemblers use unsigned arithmetic for calculations.
(e.g. for a 2-byte machine -32768 and 32768 are both
represented as 0x8000)
Update 2 Items
(1) When using the assembler directive .end to specify
the code entry address the assembler fails to set
the variable .__.END. as a global. Therefor the
value of .__.END. is not passed to the linker and
the start address frame is always zero.
(2) The linker will fail to create a start address frame
when there is no code generated within the area/bank
referenced by the .__.END. variable.
Update 1 Items
(1) The newest versions of gcc (and perhaps other
compilers) give warnings about missing arguments
in the fprintf() function. This update replaces
fprintf(arg1, arg2) with fprintf(arg1, "%s", arg2)
in each affected line of code.
(2) The newest versions of gcc (and perhaps other
compilers) have defined 'getline' as a standard
function in 'stdio.h'. This conflicts with the
function 'getline()' in the ASxxxx package.
All references to 'getline()' have been changed
to 'nxtline()'.
Before merging the asxv5pxx directory and subdirectories with
the V5.00 distribution the following files/directories must be
deleted:
[asxv5pxx\asf2mc8\f8mch.c
[asxv5pxx\asf2mc8\f8adr.c
[asxv5pxx\asf2mc8\f8pst.c
[asxv5pxx\asf2mc8\f8.h
[asxv5pxx\asxmak\vc6\asf2mc8]
[asxv5pxx\asxmak\vs05\asf2mc8]
RELEASE NOTES Page D-11
2011_07_24 Version 5.00 Update 4
This update for Version 5.00 of the ASxxxx Cross
Assemblers includes fixes for the following errors:
(1) The AS8048 base opcode value for the
JMPP instruction should be B3 and NOT 83.
(2) The AS8051 assembler calculates incorrect
offsets when using the program counter, ".",
as a destination in the instructions having
a PC-Relative addressing mode. These
instructions include: jbc, jb, jbn, jc,
jnc, jz, jnz, cjne, and djnz.
2010_10_31 Version 5.00 Update 3
This update for Version 5.00 of the ASxxxx Cross
Assemblers rolls up updates 1 and 2 with the addition of
three new assemblers and fixes:
(1) New cross assemblers for STMicroelectronics
ST6, ST7, and STM8 microprocessors.
(2) An ASlink list file update error fix (-u option)
causing some errors not to be inserted into the
created .rst file.
(3) An additional ASxxxx assembler option (-v) which
enables checking for out of range signed / unsigned
values in symbol equates and arithmetic operations.
This option has some ambiguities as internally the
assemblers use unsigned arithmetic for calculations.
(e.g. for a 2-byte machine -32768 and 32768 are both
represented as 0x8000)
Update 2 Items
(1) When using the assembler directive .end to specify
the code entry address the assembler fails to set
the variable .__.END. as a global. Therefor the
value of .__.END. is not passed to the linker and
the start address frame is always zero.
RELEASE NOTES Page D-12
(2) The linker will fail to create a start address frame
when there is no code generated within the area/bank
referenced by the .__.END. variable.
Update 1 Items
(1) The newest versions of gcc (and perhaps other
compilers) give warnings about missing arguments
in the fprintf() function. This update replaces
fprintf(arg1, arg2) with fprintf(arg1, "%s", arg2)
in each affected line of code.
(2) The newest versions of gcc (and perhaps other
compilers) have defined 'getline' as a standard
function in 'stdio.h'. This conflicts with the
function 'getline()' in the ASxxxx package.
All references to 'getline()' have been changed
to 'nxtline()'.
2010_04_01 Version 5.00 Update 2
This update for Version 5.00 of the ASxxxx Cross
Assemblers includes fixes for the following errors:
(1) When using the assembler directive .end to specify
the code entry address the assembler fails to set
the variable .__.END. as a global. Therefor the
value of .__.END. is not passed to the linker and
the start address frame is always zero.
(2) The linker will fail to create a start address frame
when there is no code generated within the area/bank
referenced by the .__.END. variable.
2010_03_03 Version 5.00 Update 1
This update for Version 5.00 of the ASxxxx Cross
Assemblers includes fixes for the following errors:
(1) The newest versions of gcc (and perhaps other
compilers) give warnings about missing arguments
in the fprintf() function. This update replaces
fprintf(arg1, arg2) with fprintf(arg1, "%s", arg2)
RELEASE NOTES Page D-13
in each affected line of code.
(2) The newest versions of gcc (and perhaps other
compilers) have defined 'getline' as a standard
function in 'stdio.h'. This conflicts with the
function 'getline()' in the ASxxxx package.
All references to 'getline()' have been changed
to 'nxtline()'.
2009_04_01 (Version 5.00)
Added a general purpose macro processor to the ASxxxx assem-
blers.
Added true (t), false (f), and true or false (tf) condition-
als to the .if / .else / .endif construct. The conditionals
.ift, .iff, and .iftf allow replacement of the .else directive
making the .if / .endif construct more readable.
e.g. .ift if condition is true
An alternate .if construction has been added to the ASxxxx
assemblers:
e.g. .if eq,... if argument == 0
The immediate conditional statements have been added to the
ASxxxx assemblers. These conditionals can replace the
.if / ... / .endif construct for a single assembler source line:
e.g. .iifeq arg label: .word 0x1234
The alternate immediate conditional statements have also been
added to the ASxxxx assemblers:
e.g. .iif eq,arg label: .word 0x1234
The listing options for the ASxxxx assemblers has been up-
dated to enable/disable any of the following parameters from be-
ing output to a generated listing file:
RELEASE NOTES Page D-14
err error codes
loc code location
bin assembler binary code
eqt symbolic equates / if evaluations
cyc machine cycles
lin assembler source line number
src assembler source code
pag paging control
lst listing of .list / .nlist
md macro definition
me macro expansion
meb macro expansion binary code
! sets the listing mode to
!(.list) or !(.nlist) before
applying the sublist options
e.g. .nlist (lst,pag) ; disable .list/.nlist listing
; and pagination
The NOT parameter, !, is used to set the listing mode to the
opposite sense of the .list or .nlist directive. For example:
.nlist (!) is equivalent to .list and
.list (!) is equivalent to .nlist
To enable listing and simultaneously disable the cycle count use
the directive:
.nlist (!,cyc)
or if you wish to suppress the listing of the .list / .nlist
directives:
.nlist ; disables all listing
.nlist (!,lst) ; enables all listing except
: .list (...) and .nlist
Normally the .list and .nlist directives are not evaluated
when encountered within a FALSE conditional block. This default
behavior can be modified by specifying a non zero argument in
the .list or .nlist directive:
.nlist 1,(!,lst) ; enables listing even within
; a FALSE conditional block
RELEASE NOTES Page D-15
The .bndry assembler directive has been added to ASxxxx. The
.bndry directive changes the current location address to be
evenly divisible by a specified integer value.
e.g. .org 0
.bndry 4
; . == 0
.org 1
.bndry 4
; . == 4
2009_02
Added the Cypress PSoc (M8C) ASM8C assembler
to ASxxxx.
2008_09
Added the 8048 (8021, 8022, and 8041) AS8048
assembler to Asxxxx.
2008_02
Added the SC/MP ASSCMP assembler to ASxxxx.
RELEASE NOTES Page D-16
2008_02_03 (Version 4.11 Update 4)
An update to the AS2650 assembler to
fix the following errors:
1) The indexed addressing mode generates invalid
code by using the first argument register as
the index register: (addr = 0x1234)
loda r0,[addr,r1] 0C F2 34
this should give 0D F2 34
2) The index addressing mode did not generate
an addressing error when the first argument
register was not r0:
stra r1,[addr,r2] should give an
error, the source must be r0
loda r2,[addr,r3] should give an
error, the destination must be r0
3) The S2650 auto increment and decrement indexing
modes always perform the register update before
the register is used. i.e. +Rn or -Rn. The
assembler now accepts +Rn or Rn+ as meaning
pre-increment and -Rn or Rn- as meaning
pre-decrement.
The AS2650 assembler tstscn files have been updated
for testing the assemblers.
2007_10_21 (Version 4.11 Fix)
In the AS6816 assembler the instruction ANDP gives
wrong object code. Changed from 37 2A to 37 3A.
RELEASE NOTES Page D-17
2007_04_01 (Version 4.11 Update 3)
An update to the ASPIC assembler and
associated fix to ASLINK:
1) Change the pic addressing to lo/hi from hi/lo
byte ordering.
2) The update fixes an error in the pic17 series
LCALL instruction.
3) A rewrite of the pic18 series assembler to change
the PC addressing from 1 per 16-bit word to 1 per
8-bit byte and add the extended instruction set.
4) Modify the Linker Merge Mode processing to take into
account the discarded low order bits for PC Relative
Addressing.
5) New tstscn files for testing the assemblers.
2006_11_01 (Version 4.11 Optional Update 2)
1) OS9 definition files and an OS9 assembler module
which creates the OS9 header, code and data areas,
and the module CRC block:
os9_mod.def OS9 Module Definitions
os9_sys.def OS9 Sytem Definitions
os9_mod.asm OS9 Module Begin / End Code
2) a program, s19os9, to post-process assembled OS9
modules in S19 format into binary OS9 modules
with the appropriate header checksum and module
CRC values calculated.
3) new make and project files which may be used to
compile the s19os9 program.
RELEASE NOTES Page D-18
2006_11_01 (Version 4.11 Optional Update 01)
The .list and .nlist directives are now modified
by .if / .else / .endif processing so that they are
active only in a TRUE clause.
The .page and .include directives are now modified
by the .list and .nlist directives so that pagination
occurs only when listing is active.
The new default functionality for the .list, .nlist
and .page directives may be modified by including an
optional argument in the directive as shown here for
the .list directive:
.list arg
a non-zero argument invokes the directive irrespective
of the .if / .else / .endif status.
2006_07_26 (Version 4.11 Patch 01)
The assembly of a direct page instruction with a
numeric constant causes a program crash when a .rel
file is created. e.g.:
andb *0x02
The use of a symbolic constant or symbol plus a
a constant compiles normally.
val = 0x02
andb *val
andb *extern+0x01
The assemblers effected are:
as6809
as6812
ash8
aspic
RELEASE NOTES Page D-19
Summary of changes/additions to the ASxxxx Assemblers from
Version 4.10 to Version 4.11.
1. Incorporated the patches contained in p01410.zip which
corrected a coding error that affected BANKS containing
multiple ABS areas or mixed AREA types.
2. Incorporated the patches contained in p02410.zip which
corrected improper use of R_USGN in most addressing
modes in AS6500. This caused unexpected errors in
V4.xx because of the ASxxxx core change to 32-bit in-
tegers and arithmetic.
3. Incorporated the patches contained in p03410.zip which
corrected errors in the .local and .globl assembler
directive processing routine that introduced unwanted
side effects for variable and symbol definition files.
These effects included improper definitions and incor-
rect error warnings.
4. The following new subdirectories and their files have
been added to the asxtst directory:
* areabank Area and Bank Processing Test
This directory contains several test programs:
ts.asm (single file - multiple areas), tm1.asm and
tm2.asm (multiple file - multiple areas), and
tbm.asm, tbm1.asm, and tbm2.asm ( multiple file -
multiple areas within a bank) and several other
files which verify the correct operation of the
linker when used with a single linked file, multi-
ple linked files having no banking, and multiple
linked files with banking. These reference files
show in detail how the .area and .bank directives
work together.
* equtst Equate Processing Test
This directory contains a test file for verifying
the operation of the .globl, .local, .equ, .gblequ,
and .lclequ directives and the =, ==, and =:
equalities.
* inctst Nested Include File Test
* itst Include File Error Reporting Test
RELEASE NOTES Page D-20
5. Incorporated the updates contained in u01410.zip which
added 10 undocumented 8085 instructions to the AS8085
assembler.
Summary of changes/additions to the ASxxxx Assemblers from
Version 4.00 to Version 4.10.
1. Added new assemblers for the Zilog EZ80, Zilog Z8, Sig-
netics 2650, and Fujitsu F2MC8(L,FX) processors.
2. Added the processor cycle count option (-c) to all pro-
cessors.
3. Several of the assemblers (ASZ80, ASRAB, AS6805,
AS6808, AS6812, ASF2MC8, ...) now support subsets or
supersets of their basic opcodes by the use of assem-
bler specific directives.
4. Added .ifeq, .ifne, .iflt, .ifgt, .ifle, and .ifge con-
ditional assembly directives.
5. Added support for the Tandy Color Computer Disc Basic
binary file format to ASLINK.
6. Problem:
When an area size is equal to the 'address space size'
the size parameter is reported as 0. (A normal condi-
tion caused by address rollover to 0.) Aslink inter-
preted this as a 0 size.
Fix:
A new area 'Output Code Flag' bit was defined to indi-
cate when data is defined in an area. ASxxxx and
Aslink have been updated to set and process this area
flag bit.
7. Problem:
The use of the .end assembler directive in an Asxxxx
assembler would cause Aslink to output the optional
start address in all output files.
Fix:
Updated Aslink to output the optional start address
only in the output file associated with the area/bank
RELEASE NOTES Page D-21
containing the .end directive.
8. Problem:
Aslink creates output files for banks with no output
data.
Fix:
Aslink now deletes any created output file for banks
with no data.
9. Incorporated the patches contained in p01400.zip for
files t1802.asm and 1802pst.c to correct for an error
in the opcodes generated for the BM, BL, and BNF
mnemonics.
10. Incorporated the patches contained in p02400.zip for
file ds8adr.c to correct for an error in the direct
page addressing mode of AS8xCxxx.
11. Incorporated the patches contained in p03400.zip for
file rabmch.c to correct for an error in the processing
of the "ret cc" instruction.
12. Made many corrections to internal code comments.
APPENDIX E
CONTRIBUTORS
Contributing Authors:
Marko Makela First Author: AS6500
Marko dot Makela at Helsinki dot Fi
John L. Hartman First Author: AS8051
noice at noicedebugger dot com ASxxxx Internals
G. Osborn Contributed To: LKS19.C and LKIXX.C
gary at s-4 dot com
Ken Hornstein Contributed To: Object Libraries
kenh at cmf dot nrl dot navy dot mil
Bill McKinnon CoAuthor: AS8XCXXX
w_mckinnon at conknet dot com
Roger Ivie First Author: ASGB
ivie at cc dot usu dot edu
Sebastion Reidel Updating and Adding alternate
sdcc at basxto dot de instruction formats found in
in the SDCC Gameboy assembler.
Uwe Stellar First Author: AS740
Uwe dot Steller at t-online dot de
Shugen Chen First Author: AS1802
schen at devry dot edu
Edgar Puehringer First Author: AS61860
edgar_pue at yahoo dot com
Ulrich Raich / Razaq Ijoduola First Authors: ASRAB
Ulrich dot Raich at cern dot ch
CONTRIBUTORS Page E-2
Patrick Head First Author: ASEZ80
patrick at phead dot net
Boisy G. Pitre Tandy Color Computer Disk Basic Binary
boisy at boisypitre dot com .ifxx directives
Mike McCarty Processor Cycle Count Option
mike dot mccarty at sbcglobal dot net
Mengjin Su PIC18Fxxx Extended Instructions
msu at micron dot com
Carl Rash Visual Studio 2010 Project Files
crash at triad dot rr dot com
John Coffman First Author: ASZ280
johninsd at gmail dot com
Mike Naberezny Suggestions and Debugging: AS78K0
mike at naberezny dot com
Mike Bezera Extensive Debugging: AS6816
mikebezera at gmail dot com
Nick Downing First Author: ASPDP11
nick @ ndcode dot org
Nick Downing First Author: AS68K
nick @ ndcode dot org
And thanks to all those who took the time to
send bug reports, suggest changes, or simply
sent a note of encouragement. These were and
are greatly appreciated. Thank you.
APPENDIX F
NOTES AND TIPS
In no particular order are some notes and tips on using the
ASxxxx assemblers that users have asked about.
F.1 REGISTER RENAMING
Sometimes it is convenient to give alternate names to a
processor's registers to improve readability or make your code
more descriptive.
For almost all the assemblers the registers are defined in-
ternally and do not have a value. This means that using an
equate statement will fail:
iptr .equ R3 / iptr = R3
and will give a , undefined, error.
Use the .define directive to specify the alternate name for a
register:
.define keyword ^/string/
e.g.
.define iptr ^/R3/
The assembler, when it finds the key word 'iptr', will first
replace the string 'iptr' with 'R3' and then process the line.
(Note that the keyword must start with a letter.)
NOTES AND TIPS PAGE F-2
AREAS AND BANKS
F.2 AREAS AND BANKS
The .area and .bank directives are just a means of organiz-
ing, ordering, combining, and placing code where you want it.
An example might be the construction of an area which con-
tains addresses of messages and an area containing the messages.
In this case define an area which will only contain the base ad-
dress of the address table, the second will contain the list of
addresses, and the third which will contain the messages.
.area msgbas ; Message address base
.area msgadr ; Message addresses
.area msgs ; Messages
Then insert message addresses in area msgaddr and messages in
area msgs:
.area msgbas ; Base of msgadr table
msgadr:
.area msgadr
.word msg01 ; Address of message 1
.word msg02 ; Address of message 2
...
.area msgs
msg01: .asciz "Message Number 1"
msg02: .asciz "Message Number 2"
...
.area MyCode ; Reselect Code Area
(Note: be sure to reselect the code area you want before
continuing with your coding.)
At any further point in your source code you can insert addi-
tional messages in the table by simply repeating the process:
NOTES AND TIPS PAGE F-3
AREAS AND BANKS
.area msgadr
.word msg03 ; Address of message 3
...
.area msgs
msg03: .asciz "Message Number 3"
...
.area MyCode ; Reselect Code Area
with the message addresses and messages appended to the previous
entries. (Note that the label msgadr, which is the beginning of
the address table, is required to be presented to the linker be-
fore area msgadr.)
This procedure can be replicated as needed and also in other
assembly files. The ordering will be defined by the order in
which the individually assembled modules are linked. This may
be especially useful when linking optional modules and want
their messages included in the same dispatch table.
It will be easier to manage your areas by creating an assem-
bly file which contains the ordering of your code and including
it in all your assembly files or assemble this definition file
and make it the first file when linking your project.
In this example the definition file should contain the fol-
lowing three areas:
...
.area msgbas ; Message Base
.area msgadr ; Message Addresses
.area msgs ; Messages
...
The bank directive allows the programmer to position code
anywhere in the address space of the processor. Suppose it is
desired to place the message tables at location 0x6000 in the
processor address space. The bank directives might be:
.bank MsgTbl (Base=0x6000)
and the area definitions should be changed to place the code
into the specific bank:
NOTES AND TIPS PAGE F-4
AREAS AND BANKS
...
.area msgbas (Bank=MsgTbl) ; Message Base
.area msgadr (Bank=MsgTbl) ; Message Addresses
.area msgs (Bank=MsgTbl) ; Messages
...
One should note that by using a definition file, which con-
tains all the area/bank options, all other assembly files need
only .area directives with the area name.
F.3 INHIBITING INCLUDE FILE PAGINATION
The default actions when the .include directive is invoked
are:
1) Interrupt current assembly processing
2) Start a New Page
3) Assemble include file statements
4) Start a New Page
5) Continue assembling where interrupted
To inhibit the 'Start a New Page' steps when including a
file, insert the appropriate listing directives as shown in this
example.
.nlist ; Inhibits Pagination
.include "area.def" ; Include the File
.list ; Restart Listing
Because the .nlist directive also applies to the include file
you must place an appropriate .list directive in the include
file. At completion of the include file processing listing au-
tomatically reverts to the .nlist mode and pagination is again
suppressed. The .list directive then restores normal listing as
assembly processing continues.
NOTES AND TIPS PAGE F-5
INHIBITING INCLUDE FILE PAGINATION
NOTE
If the assembled include file generates output object
code and a .rst file is going to be created by the
linker, then the assembler listing file must include
the .list options (loc,bin) for regular code or (meb)
for macro generated code. Failure to include all
generated code in the listing file will result in
translation errors in the .rst file.
When inserting an included file using the above technique and
there is no listing directive within the file, then the result-
ing assembler listing file will show no indication the file was
actually included. .list and .nlist are never shown in the out-
put listing file. To indicate the file was included, using the
example Area/Bank definition file, one might list a single line
description of the inclusion by inserting these lines in the in-
cluded file.
.list (!,src)
; area.def Areas/Banks Defined
.nlist
Then the result of
.nlist ; Inhibits Pagination
.include "area.def" ; Include the File
.list ; Restart Listing
will be a single line in the assembly listing:
; area.def Areas/Banks Defined
F.4 TO INCLUDE OR TO INCLUDE
When building a project there is always the decision to as-
semble multiple files together on the command line, use the .in-
clude directive to insert assembly files into the project, or to
assemble files separately and then combine them using the
linker.
When coding reusable modules it may be more convenient to as-
semble these modules separately. However this also requires a
method to define the global entry points and data for the
NOTES AND TIPS PAGE F-6
TO INCLUDE OR TO INCLUDE
calling program. The following technique allows any of the
three methods described to be used.
The module is designed in such a way that it can be used as
an independent module, included module, and a globals definition
file. The first step is to open a file, perhaps 'fnctns.asm',
inhibit listing, and create a macro which holds all the global
definitions:
.nlist
.macro fnctns.globals
.globl func1 ; function 1
.globl func2 ; function 2
.globl inpval ; input variable
.globl outval ; ouput variable
.endm
Next add code that invokes just the globals or the globals
and the module's code. Do this by using a conditional that
checks if a specific label has been defined. As an example use
the string "_fnctns" as the label that must be defined.
.ifdef "_fnctns"
fnctns.globals
.else
.list
fnctns.globals
... ; module code
...
...
.nlist
.endif
This file can be assembled as a separate module or as an in-
cluded file in the project. If the project is built by linking
this module with other modules then any module which references
the functions or variables in the module "fnctns.asm" will need
these to be defined. Add this code to any module using the mod-
ule "fnctns".
NOTES AND TIPS PAGE F-7
TO INCLUDE OR TO INCLUDE
.define "_fnctns" ; key word
.nlist ; Inhibits Pagination
.include "fnctns.asm" ; Include the File
.list ; Restart Listing
This results in only the globals being defined for the module
"fnctns.asm".
APPENDIX AA
ASCHECK ASSEMBLER
The ASxxxx assembler ASCHECK is used to test the machine in-
dependent features of the ASxxxx assemblers. The source files
for the ASCHECK assembler are also useful as a template for the
development of a new ASxxxx assembler.
The ASCHECK assembler has all the ASxxxx directives enabled
for testing all features of the assemblers.
ASCHECK ASSEMBLER Page AA-2
AA.1 .opcode DIRECTIVE
Format:
.opcode n
The .opcode directive creates a single byte of code having the
value n and having cycle counts defined in the following table:
/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*--*--* - - - - - - - - - - - - - - - - */
/*00*/ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
/*10*/ UN, 1,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*20*/ UN,UN, 2,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*30*/ UN,UN,UN, 3,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*40*/ UN,UN,UN,UN, 4,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*50*/ UN,UN,UN,UN,UN, 5,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*60*/ UN,UN,UN,UN,UN,UN, 6,UN,UN,UN,UN,UN,UN,UN,UN,UN,
/*70*/ UN,UN,UN,UN,UN,UN,UN, 7,UN,UN,UN,UN,UN,UN,UN,UN,
/*80*/ UN,UN,UN,UN,UN,UN,UN,UN, 8,UN,UN,UN,UN,UN,UN,UN,
/*90*/ UN,UN,UN,UN,UN,UN,UN,UN,UN, 9,UN,UN,UN,UN,UN,UN,
/*A0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,10,UN,UN,UN,UN,UN,
/*B0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,11,UN,UN,UN,UN,
/*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,12,UN,UN,UN,
/*D0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,13,UN,UN,
/*E0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,14,UN,
/*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,15
The UN symbols indicate 'undefined cycles' where no cycle count
will be output.
APPENDIX AB
AS1802 ASSEMBLER
AB.1 ACKNOWLEDGMENT
Thanks to Shujen Chen for his contribution of the AS1802
cross assembler.
Shujen Chen
DeVry University
Tinley Park, IL
schen at tp dot devry dot edu
AB.2 1802 REGISTER SET
The following is a list of the 1802 registers used by AS1802:
r0-r15 - 8-bit registers
sp - register r2
pc - register r3
call - register r4
return - register r5
argr - register r6
AS1802 ASSEMBLER PAGE AB-2
1802 INSTRUCTION SET
AB.3 1802 INSTRUCTION SET
The following tables list all 1802 mnemonics recognized by
the AS1802 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS1802:
#data immediate data
byte or word data
expr expression
Rn register addressing
label branch label
The terms data, expr, and label may be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 1802 technical data for valid modes.
AB.3.1 1802 Inherent Instructions
adc add and
dis idl irx
ldx ldxa lsdf
lsie lskp lsnf
lsnq lsnz lsq
lsz mark nop
or req ret
rshl rshr sav
sd sdb seq
shl shlc shr
shrc skp sm
smb stxd xor
AS1802 ASSEMBLER PAGE AB-3
1802 INSTRUCTION SET
AB.3.2 1802 Short Branch Instructions
b1 label b2 label
b3 label b4 label
bdf label bge label
bl label bm label
bn1 label bn2 label
bn3 label bn4 label
bnf label bnq label
bnz label bpz label
bq label br label
bz label nbr label
AB.3.3 1802 Long Branch Instructions
lbdf label lbnf label
lbnq label lbnz label
lbq label lbr label
lbz label nlbr label
AB.3.4 1802 Immediate Instructions
adci #data adi #data
ani #data ldi #data
ori #data sdbi #data
sdi #data smbi #data
smi #data xri #data
AB.3.5 1802 Register Instructions
dec Rn ghi Rn
glo Rn inc Rn
lda Rn ldn Rn
phi Rn plo Rn
sep Rn sex Rn
str Rn
AS1802 ASSEMBLER PAGE AB-4
1802 INSTRUCTION SET
AB.3.6 1802 Input and Output Instructions
inp expr
out expr
AS1802 ASSEMBLER PAGE AB-5
1802 INSTRUCTION SET
AB.3.7 CDP1802 COSMAC Microprocessor Instruction Set Summary
----------------------------------------------------------------
| |
| |
| RCA |
| |
| 1 88888 000 22222 |
| 11 8 8 0 0 2 2 |
| 1 8 8 0 0 0 2 |
| 1 88888 0 0 0 222 |
| 1 8 8 0 0 0 2 |
| 1 8 8 0 0 2 |
| 111 88888 000 2222222 |
| |
| CDP1802 COSMAC Microprocessor Instruction Set Summary |
| |
| |
| |
| |
|Written by Jonathan Bowen |
| Programming Research Group |
| Oxford University Computing Laboratory |
| 8-11 Keble Road |
| Oxford OX1 3QD |
| England |
| |
| Tel +44-865-273840 |
| |
|Created August 1981 |
|Updated April 1985 |
|Issue 1.3 Copyright (C) J.P.Bowen 1985|
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-6
1802 INSTRUCTION SET
----------------------------------------------------------------
| |
| CDP1802 COSMAC Microprocessor Pinout |
| |
| _________ _________ |
| _| \__/ |_ |
| --> CLOCK |_|1 40|_| Vdd |
| ____ _| |_ ____ |
| --> WAIT |_|2 39|_| XTAL --> |
| _____ _| |_ ______ |
| --> CLEAR |_|3 38|_| DMA IN <-- |
| _| |_ _______ |
| <-- Q |_|4 37|_| DMA OUT <-- |
| _| |_ _________ |
| <-- SC1 |_|5 36|_| INTERRUPT <-- |
| _| |_ ___ |
| <-- SC0 |_|6 35|_| MWR <-- |
| ___ _| |_ |
| <-- MRD |_|7 34|_| TPA --> |
| _| |_ |
| <--> BUS 7 |_|8 33|_| TPB --> |
| _| |_ |
| <--> BUS 6 |_|9 32|_| MA7 --> |
| _| |_ |
| <--> BUS 5 |_|10 1802 31|_| MA6 --> |
| _| |_ |
| <--> BUS 4 |_|11 30|_| MA5 --> |
| _| |_ |
| <--> BUS 3 |_|12 29|_| MA4 --> |
| _| |_ |
| <--> BUS 2 |_|13 28|_| MA3 --> |
| _| |_ |
| <--> BUS 1 |_|14 27|_| MA2 --> |
| _| |_ |
| <--> BUS 0 |_|15 26|_| MA1 --> |
| _| |_ |
| Vcc |_|16 25|_| MA0 --> |
| _| |_ ___ |
| <-- N2 |_|17 24|_| EF1 <-- |
| _| |_ ___ |
| <-- N1 |_|18 23|_| EF2 <-- |
| _| |_ ___ |
| <-- N0 |_|19 22|_| EF3 <-- |
| _| |_ ___ |
| Vss |_|20 21|_| EF4 <-- |
| |______________________| |
| |
| |
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-7
1802 INSTRUCTION SET
----------------------------------------------------------------
|Mnem. |Op|F|Description |Notes |
|------+--+-+----------------------------+---------------------|
|ADC |74|*|Add with Carry |{DF,D}=mx+D+DF |
|ADCI i|7C|*|Add with Carry Immediate |{DF,D}=mp+D+DF,p=p+1 |
|ADD |F4|*|Add |{DF,D}=mx+D |
|ADI i|FC|*|Add Immediate |{DF,D}=mp+D,p=p+1 |
|AND |F2|*|Logical AND |D={mx}&D |
|ANI i|FA|*|Logical AND Immediate |D={mp}&D,p=p+1 |
|B1 a|34|-|Branch if EF1 |If EF1=1 BR else NBR |
|B2 a|35|-|Branch if EF2 |If EF2=1 BR else NBR |
|B3 a|36|-|Branch if EF3 |If EF3=1 BR else NBR |
|B4 a|37|-|Branch if EF4 |If EF4=1 BR else NBR |
|BDF a|33|-|Branch if DF |If DF=1 BR else NBR |
|BGE a|33|-|Branch if Greater or Equal |See BDF |
|BL a|38|-|Branch if Less |See BNF BR else NBR |
|BM a|38|-|Branch if Minus |See BNF |
|BN1 a|3C|-|Branch if Not EF1 |If EF1=0 BR else NBR |
|BN2 a|3D|-|Branch if Not EF2 |If EF2=0 BR else NBR |
|BN3 a|3E|-|Branch if Not EF3 |If EF3=0 BR else NBR |
|BN4 a|3F|-|Branch if Not EF4 |If EF4=0 BR else NBR |
|BNF a|38|-|Branch if Not DF |If DF=0 BR else NBR |
|BNQ a|39|-|Branch if Not Q |If Q=0 BR else NBR |
|BNZ a|3A|-|Branch if D Not Zero |If D=1 BR else NBR |
|BPZ a|33|-|Branch if Positive or Zero |See BDF |
|BQ a|31|-|Branch if Q |If Q=1 BR else NBR |
|BR a|30|-|Branch |pl=mp |
|BZ a|32|-|Branch if D Zero |If D=0 BR else NBR |
|DEC r|2N|-|Decrement register N |n=n-1 |
|DIS |71|-|Disable |{X,P}=mx,x=x+1,IE=0 |
|GHI r|9N|-|Get High register N |D=nh |
|GLO r|8N|-|Get Low register N |D=nl |
|IDL |00|-|Idle (wait for DMA or int.) |Bus=m0 |
|INC r|1N|-|Increment register N |n=n+1 |
|INP d|6N|-|Input (N=d+8=9-F) |mx=Bus,D=Bus,Nlines=d|
|IRX |60|-|Increment register X |x=x+1 |
|LBDF a|C3|-|Long Branch if DF |If DF=1 LBR else LNBR|
|LBNF a|C8|-|Long Branch if Not DF |If DF=0 LBR else LNBR|
|LBNQ a|C9|-|Long Branch if Not Q |If Q=0 LBR else LNBR |
|LBNZ a|CA|-|Long Branch if D Not Zero |If D=1 LBR else LNBR |
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-8
1802 INSTRUCTION SET
----------------------------------------------------------------
|Mnem. |Op|F|Description |Notes |
|------+--+-+----------------------------+---------------------|
|LBQ a|C1|-|Long Branch if Q |If Q=1 LBR else LNBR |
|LBR a|C0|-|Long Branch |p=mp |
|LBZ a|C2|-|Long Branch if D Zero |If D=0 LBR else LNBR |
|LDA r|4N|-|Load advance |D=mn,n=n+1 |
|LDI i|F8|-|Load Immediate |D=mp,p=p+1 |
|LDN r|0N|-|Load via N (except N=0) |D=mn |
|LDX |F0|-|Load via X |D=mx |
|LDXA |72|-|Load via X and Advance |D=mx,x=x+1 |
|LSDF |CF|-|Long Skip if DF |If DF=1 LSKP else NOP|
|LSIE |CC|-|Long Skip if IE |If IE=1 LSKP else NOP|
|LSKP |C8|-|Long Skip |See NLBR |
|LSNF |C7|-|Long Skip if Not DF |If DF=0 LSKP else NOP|
|LSNQ |C5|-|Long Skip if Not Q |If Q=0 LSKP else NOP |
|LSNZ |C6|-|Long Skip if D Not Zero |If D=1 LSKP else NOP |
|LSQ |CD|-|Long Skip if Q |If Q=1 LSKP else NOP |
|LSZ |CE|-|Long Skip if D Zero |If D=0 LSKP else NOP |
|MARK |79|-|Push X,P to stack (T={X,P})|m2={X,P},X=P,r2=r2-1 |
|NBR |38|-|No short Branch (see SKP) |p=p+1 |
|NLBR a|C8|-|No Long Branch (see LSKP) |p=p+2 |
|NOP |C4|-|No Operation |Continue |
|OR |F1|*|Logical OR |D={mx}vD |
|ORI i|F9|*|Logical OR Immediate |D={mp}vD,p=p+1 |
|OUT d|6N|-|Output (N=d=1-7) |Bus=mx,x=x+1,Nlines=d|
|PLO r|AN|-|Put Low register N |nl=D |
|PHI r|BN|-|Put High register N |nh=D |
|REQ |7A|-|Reset Q |Q=0 |
|RET |70|-|Return |{X,P}=mx,x=x+1,IE=1 |
|RSHL |7E|*|Ring Shift Left |See SHLC |
|RSHR |76|*|Ring Shift Right |See SHRC |
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-9
1802 INSTRUCTION SET
----------------------------------------------------------------
|Mnem. |Op|F|Description |Notes |
|------+--+-+----------------------------+---------------------|
|SAV |78|-|Save |mx=T |
|SDB |75|*|Subtract D with Borrow |{DF,D}=mx-D-DF |
|SDBI i|7D|*|Subtract D with Borrow Imm. |{DF,D}=mp-D-DF,p=p+1 |
|SD |F5|*|Subtract D |{DF,D}=mx-D |
|SDI i|FD|*|Subtract D Immediate |{DF,D}=mp-D,p=p+1 |
|SEP r|DN|-|Set P |P=N |
|SEQ |7B|-|Set Q |Q=1 |
|SEX r|EN|-|Set X |X=N |
|SHL |FE|*|Shift Left |{DF,D}={DF,D,0}<- |
|SHLC |7E|*|Shift Left with Carry |{DF,D}={DF,D}<- |
|SHR |F6|*|Shift Right |{D,DF}=->{0,D,DF} |
|SHRC |76|*|Shift Right with Carry |{D,DF}=->{D,DF} |
|SKP |38|-|Short Skip |See NBR |
|SMB |77|*|Subtract Memory with Borrow |{DF,D}=D-mx-{~DF} |
|SMBI i|7F|*|Subtract Mem with Borrow Imm|{DF,D}=D-mp-~DF,p=p+1|
|SM |F7|*|Subtract Memory |{DF,D}=D-mx |
|SMI i|FF|*|Subtract Memory Immediate |{DF,D}=D-mp,p=p+1 |
|STR r|5N|-|Store via N |mn=D |
|STXD |73|-|Store via X and Decrement |mx=D,x=x-1 |
|XOR |F3|*|Logical Exclusive OR |D={mx}.D |
|XRI i|FB|*|Logical Exclusive OR Imm. |D={mp}.D,p=p+1 |
| | |-|Interrupt action |T={X,P},P=1,X=2,IE=0 |
|------+--+-+--------------------------------------------------|
| |??| |8-bit hexadecimal opcode |
| |?N| |Opcode with register/device in low 4/3 bits |
| | |-|DF flag unaffected |
| | |*|DF flag affected |
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-10
1802 INSTRUCTION SET
----------------------------------------------------------------
|Arguments | Notes |
|-----------+--------------------------------------------------|
| mn |Register addressing |
| mx |Register-indirect addressing |
| mp |Immediate addressing |
| R( ) |Stack addressing (implied addressing) |
|-----------+--------------------------------------------------|
| D |Data register (accumulator, 8-bit) |
| DF |Data Flag (ALU carry, 1-bit) |
| I |High-order instruction digit (4-bit) |
| IE |Interrupt Enable (1-bit) |
| N |Low-order instruction digit (4-bit) |
| P |Designates Program Counter register (4-bit) |
| Q |Output flip-flop (1-bit) |
| R |1 of 16 scratchpad Registers(16-bit) |
| T |Holds old {X,P} after interrupt (X high, 8-bit) |
| X |Designates Data Pointer register (4-bit) |
|-----------+--------------------------------------------------|
| mn |Memory byte addressed by R(N) |
| mp |Memory byte addressed by R(P) |
| mx |Memory byte addressed by R(X) |
| m? |Memory byte addressed by R(?) |
| n |Short form for R(N) |
| nh |High-order byte of R(N) |
| nl |Low-order byte of R(N) |
| p |Short form for R(P) |
| pl |Low-order byte of R(P) |
| r? |Short form for R(?) |
| x |Short form for R(X) |
|-----------+--------------------------------------------------|
| R(N) |Register specified by N |
| R(P) |Current program counter |
| R(X) |Current data pointer |
| R(?) |Specific register |
----------------------------------------------------------------
AS1802 ASSEMBLER PAGE AB-11
1802 INSTRUCTION SET
----------------------------------------------------------------
|Arguments | Notes |
|-----------+--------------------------------------------------|
| a |Address expression |
| d |Device number (1-7) |
| i |Immediate expression |
| n |Expression |
| r |Register (hex digit or an R followed by hex digit)|
|-----------+--------------------------------------------------|
| + |Arithmetic addition |
| - |Arithmetic subtraction |
| * |Arithmetic multiplication |
| / |Arithmetic division |
| & |Logical AND |
| ~ |Logical NOT |
| v |Logical inclusive OR |
| . |Logical exclusive OR |
| <- |Rotate left |
| -> |Rotate right |
| { } |Combination of operands |
| ? |Hexadecimal digit (0-F) |
| --> |Input pin |
| <-- |Output pin |
| <--> |Input/output pin |
----------------------------------------------------------------
APPENDIX AC
AS2650 ASSEMBLER
AC.1 2650 REGISTER SET
The following is a list of the 2650 registers used by AS2650:
r0,r1 - 8-bit accumulators
r2,r3
AC.2 2650 INSTRUCTION SET
The following tables list all 2650 mnemonics recognized by
the AS2650 assembler. The designation [] refers to a required
addressing mode argument. The designation CC refers to a re-
quired condition code argument: .eq., .gt., .lt., .un., or
value of 0-3. The following list specifies the format for each
addressing mode supported by AS2650:
#data immediate byte data
r0,r1,r2,r3 registers
addr location/branch address
[addr] or indirect addressing
@addr
[addr,r0] or register indexed
@addr,r0 indirect addressing
[addr,-r0] or autodecrement register indexed
@addr,-r0 indirect addressing
AS2650 ASSEMBLER PAGE AC-2
2650 INSTRUCTION SET
[addr,r0+] or autoincrement register indexed
@addr,r0+ indirect addressing
.eq. CC: equal (== 0)
.gt. CC: greater than (== 1)
.lt. CC: less than (== 2)
.un. CC: unconditional (== 3)
The terms data, label, and addr may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 2650 technical data for valid modes.
AC.2.1 Load / Store Instructions
lodz r lodi #data
lodr [] loda []
stoz r
stor [] stoa []
AC.2.2 Arithmetic / Compare Instructions
addz r addi #data
addr [] adda []
subz r subi #data
subr [] suba []
comz r comi #data
comr [] coma []
dar r
AC.2.3 Logical / Rotate Instructions
andz r andi #data
andr [] anda []
iorz r iori #data
iorr [] iora []
eorz r eori #data
eorr [] eora []
rrr r
AS2650 ASSEMBLER PAGE AC-3
2650 INSTRUCTION SET
rrl r
AC.2.4 Condition Code Branches
bctr CC,[] bcta CC,[]
bcfr CC,[] bcfa CC,[]
bstr CC,[] bsta CC,[]
bsfr CC,[] bsta CC,[]
AC.2.5 Register Test Branches
brnr r,[] brna r,[]
birr r,[] bira r,[]
bdrr r,[] bdra r,[]
bsnr r,[] bsna r,[]
AC.2.6 Branches (to Subroutines) / Returns
bxa [] bsxa []
zbrr [] zbsr []
retc CC rete CC
AC.2.7 Input / Output
redc r wrtc r
redd r wrtd r
rede r,addr wrte r,addr
AS2650 ASSEMBLER PAGE AC-4
2650 INSTRUCTION SET
AC.2.8 Miscellaneos
halt nop
tmi r,#data
AC.2.9 Program Status
lpsl lpsu
spsl spsu
cpsl #data cpsu #data
ppsl #data ppsu #data
tpsl #data tpsu #data
APPENDIX AD
AS4040 ASSEMBLER
The AS4040 assembler supports the 4040 microprocessor in-
struction set and can be configured to support only the subset
of instructions used by the 4004 microprocessor.
AD.1 PROCESSOR SPECIFIC DIRECTIVES
AD.1.1 .4040 Directive
Format:
.4040
The .4040 directive specifies that the assembler recognize the
complete 4040 instruction set. This is the default instruction
set recognized by the as4040 assembler.
AD.1.2 .4004
Format:
.4004
The .4004 directive specifies that the assembler recognize only
the subset of the 4040 instructions available on the 4004
microprocessor. The unsupported instructions will be flagged
with an 'o' error during assembly.
AS4040 ASSEMBLER PAGE AD-2
PROCESSOR SPECIFIC DIRECTIVES
AD.1.3 The .__.CPU. Variable
The assembler variable .__.CPU. is set to indicate the
specific processor selected:
.__.CPU. Processor
-------- ---------
0 4040
1 4004
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbols to
be output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that separately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AD.2 4040/4004 REGISTER SET
The following is a list of the 4040/4004 registers used by
AS4040:
r0, r1, r2, r3, - 4-bit registers
r4, r5, r6, r7,
r8, r9, r10, r11,
r12, r13, r14, r15
rp0, rp1 - 8-bit register pairs
rp2, rp3
rp4, rp5
rp6, rp7
AS4040 ASSEMBLER PAGE AD-3
4040/4004 REGISTER SET
AD.3 4004/4040 INSTRUCTION SET
Instruction Argument Syntax:
Rn registers R0 - R15
or a value in the range 0 to 15
RPn register pairs RP0 - RP7
or a value in the range 0 to 7
#data immediate 4-bit or 8-bit data
addr call, jump address, or label
cc condition code forms
Mnemonic Binary Jump Condition
-------- ------ --------------
nc 0000 no condition
tz, t0 0001 test equals zero
tn, t1 1001 test equals one
cn, c1 0010 carry equals one
cz, c0 1010 carry equals zero
az, a0 0100 accumulator equals zero
an, nza 1100 accumulator not zero
any single mnemonic
or any ored combination of
tz, cn, az, t0, c1, and a0
or any ored combination of
tn, cz, an, t1, c0, and nza
or any value in the range 0 to 15
are valid condition code arguments.
The mnemonics listed above are predefined
such that a mixed argument like cz|az will
report an 'a' error during assembly.
The terms data and addr may be expressions.
Note that not all addressing modes may be valid with every
instruction. Refer to the 4040/4004 technical data for valid
modes.
The following tables list the mnemonics and arguments recog-
nized by the AS4040 assembler. The extended instructions are
available only in the 4040 microprocessor.
AS4040 ASSEMBLER PAGE AD-4
4004/4040 INSTRUCTION SET
AD.3.1 4040/4004 Instructions
Machine Instructions
nop (No Operation)
jcn cc,addr (Jump On Condition, Current Page)
fim RPn,#data (Fetch Immediate To RPn)
src RPn (Send Address From RPn)
fin RPn (Fetch Indirect From ROM Into RPn)
jin RPn (Jump Indirect RPn)
jun addr (Jump Unconditional To ROM Address)
jms addr (Jump To Subroutine ROM Address)
inc Rn (Increment Rn)
isz Rn, addr (Increment Rn, Jump If Rn != 0)
add Rn (Add Rn To A With Carry)
sub Rn (Subtract Rn From A With Borrow)
ld Rn (Load A With Rn)
xch Rn (A <--> Rn)
bbl #data (Branch Back 1 Level, Load A With data)
ldm #data (Load A With data)
Input/Output And RAM Instructions
wrm (A -> Selected RAM Character)
wmp (A -> Selected RAM Output Port)
wrr (A -> Selected ROM Output Port)
wpm (A -> Selected RAM Half Byte)
wr0 (A -> Selected RAM Character 0)
wr1 (A -> Selected RAM Character 1)
wr2 (A -> Selected RAM Character 2)
wr3 (A -> Selected RAM Character 3)
sbm (A <- (A - Slctd RAM Char With Borrow))
rdm (A <- Selected RAM Character)
rdr (A <- Selected ROM Input Port)
adm (A <- (A + Slctd RAM Char With Carry))
rd0 (A <- Selected RAM Character 0)
rd1 (A <- Selected RAM Character 1)
rd2 (A <- Selected RAM Character 2)
rd3 (A <- Selected RAM Character 3)
Accumulator Group Instructions
clb (A <- 0, C <- 0)
clc (C <- 0)
iac (A <- (A + 1))
cmc (Complement Carry)
cma (Complement Accumulator)
ral (Rotate A,C Left)
rar (Rotate A,C Right)
tcc (Tranfer C To Accumulator, Clear C)
dac (A <- (A - 1))
tcs (Transfer Carry Subtract, Clear C)
AS4040 ASSEMBLER PAGE AD-5
4004/4040 INSTRUCTION SET
stc (Set Carry)
daa (Decimal Adjust Accumulator)
kbp (Keyboard Process)
dcl (Designate Command Line)
AD.3.2 4040 Specific Instructions
hlt (Halt)
bbs (Branch Back From Interrupt)
lcr (A <- Command Register)
or4 (A <- (R4 or A))
or5 (A <- (R5 or A))
an6 (A <- (R6 and A))
an7 (A <- (R7 and A))
db0 (Designate ROM Bank 0)
db1 (Designate ROM Bank 1)
sb0 (Select Index Register Bank 0, 0 - 7)
sb1 (Select Index Register Bank 1, 0* - 7*)
ein (Enable Interrupt)
din (Disable Interrupt)
rpm (Read Program Memory)
AD.3.3 Extended Conditional Jump Instructions
jtz addr - jump if test zero
jtn addr - jump if test not zero
jto addr - jump if test one
jcz addr - jump if carry/link zero
jnc addr - jump if no carry
jco addr - jump if carry/link one
joc addr - jump on carry
jaz addr - jump if accumulator equal to zero
jnz addr - jump if accumulator non zero
jan addr - jump if accumulator non zero
APPENDIX AE
AS430 ASSEMBLER
AE.1 MPS430 REGISTER SET
The following is a list of the MPS430 registers used by AS430:
Sixteen 16-bit registers provide adddress, data, and
special functions:
pc / r0 - program counter
sp / r1 - stack pointer
sr / r2 - status register
cg1 / r2 - constant generator 1
cg2 / r3 - constant generator 2
r4 - working register r4
r5 - working register r5
...
r14 - working register r14
r15 - working register r15
AS430 ASSEMBLER PAGE AE-2
MPS430 REGISTER SET
AE.2 MPS430 ADDRESSING MODES
The following list specifies the format for each addressing
mode supported by AS430:
Source/Destination Operand Addressing Modes
As/Ad Addressing Mode Syntax Description
----- --------------- ------ -----------
00/0 Register mode Rn Register contents are operand.
01/1 Indexed mode X(Rn) (Rn + X) points to the operand,
X is stored in the next word.
01/1 Symbolic mode ADDR (PC + X) points to the operand,
X is stored in the next word,
Indexed mode X(PC) is used.
01/1 Absolute mode &ADDR The word following the
instruction, contains the
absolute address.
10/- Indirect @Rn Rn is used as a pointer to the
register mode operand.
11/- Indirect @Rn+ Rn is used as a pointer to the
autoincrement operand. Rn is incremented
afterwards.
11/- Immediate mode #N The word following the
instruction contains the
immediate constant N. Indirect
autoincrement mode @PC+ is used.
The terms ADDR, X and N may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the MPS430 technical data for valid modes.
AS430 ASSEMBLER PAGE AE-3
MPS430 ADDRESSING MODES
AE.2.1 MPS430 Instruction Mnemonics
The following table lists all MPS430 family mnemonics recognized
by the AS430 assembler. The designations src and dst refer to
required source and/or destination addressing mode arguments.
* ADC[.W];ADC.B dst dst + C -> dst
ADD[.W];ADD.B src,dst src + dst -> dst
ADDC[.W];ADDC.B src,dst src + dst + C -> dst
AND[.W];AND.B src,dst src .and. dst -> dst
BIC[.W];BIC.B src,dst .not.src .and. dst -> dst
BIS[.W];BIS.B src,dst src .or. dst -> dst
BIT[.W];BIT.B src,dst src .and. dst
* BR dst Branch to .......
* BRANCH dst Branch to .......
CALL dst PC+2 -> stack, dst -> PC
* CLR[.W];CLR.B dst Clear destination
* CLRC Clear carry bit
* CLRN Clear negative bit
* CLRZ Clear zero bit
CMP[.W];CMP.B src,dst dst - src
* DADC[.W];DADC.B dst dst + C -> dst (decimal)
DADD[.W];DADD.B src,dst src + dst + C -> dst (decimal)
* DEC[.W];DEC.B dst dst - 1 -> dst
* DECD[.W];DECD.B dst dst - 2 -> dst
* DINT Disable interrupt
* EINT Enable interrupt
* INC[.W];INC.B dst dst + 1 -> dst
* INCD[.W];INCD.B dst dst + 2 -> dst
* INV[.W];INV.B dst Invert destination
JC/JHS Label Jump to Label if Carry-bit is set
JEQ/JZ Label Jump to Label if Zero-bit is set
JGE Label Jump to Label if (N .XOR. V) = 0
JL Label Jump to Label if (N .XOR. V) = 1
JMP Label Jump to Label unconditionally
JN Label Jump to Label if Negative-bit is set
JNC/JLO Label Jump to Label if Carry-bit is reset
JNE/JNZ Label Jump to Label if Zero-bit is reset
MOV[.W];MOV.B src,dst src -> dst
* NOP No operation
AS430 ASSEMBLER PAGE AE-4
MPS430 ADDRESSING MODES
* POP[.W];POP.B dst Item from stack, SP+2 -> SP
PUSH[.W];PUSH.B src SP - 2 -> SP, src -> @SP
RETI Return from interrupt
TOS -> SR, SP + 2 -> SP
TOS -> PC, SP + 2 -> SZP
* RET Return from subroutine
TOS -> PC, SP + 2 -> SP
* RLA[.W];RLA.B dst Rotate left arithmetically
* RLC[.W];RLC.B dst Rotate left through carry
RRA[.W];RRA.B dst MSB -> MSB . ....LSB -> C
RRC[.W];RRC.B dst C -> MSB . ......LSB -> C
* SBC[.W];SBC.B dst Subtract carry from destination
* SETC Set carry bit
* SETN Set negative bit
* SETZ Set zero bit
SUB[.W];SUB.B src,dst dst + .not.src + 1 -> dst
SUBC[.W];SUBC.B src,dst dst + .not.src + C -> dst
SBB[.W];SBB.B src,dst dst + .not.src + C -> dst
SWPB dst swap bytes
SXT dst Bit7 -> Bit8 ........ Bit15
* TST[.W];TST.B dst Test destination
XOR[.W];XOR.B src,dst src .xor. dst -> dst
Note: Asterisked Instructions
Asterisked (*) instructions are emulated.
They are replaced with coreinstructions
by the assembler.
APPENDIX AF
AS6100 ASSEMBLER
AF.1 6100 MACHINE DESCRIPTION
The IM6100 (Intersil) and HM6100 (Harris) microprocessors are
12-bit word addressable machines having three 12-bit program ac-
cessible registers and one single bit register. These are the
Accumulator (AC), MQ Register (MQ), Program Counter (PC), and
the Link (L) respectively.
The 6100 is basically a clone of the Digital Equipment Cor-
poration PDP-8E minicomputer architecture. This architecture
predates all microprocessors and labeled the bits from 0 (the
most significant) to 11 (the least significant) rather than from
least to most significant. The actual labeling is arbitrary and
the as6100 assembler uses the now more common labeling.
The output generated from the assembler/linker is two bytes
per word ordered as MSB then LSB with the upper 4 bits of the
MSB always zero.
AF.2 ASSEMBLER SPECIFIC DIRECTIVES
Because the 6100 microprocessor has no concept of bytes
several of the cross assembler directives have their operation
changed to reflect the 12-Bit nature of the microprocessor.
These are:
.byte (.db and .fcb are aliases)
output an 8-Bit value
into a 12-bit word
.word (.dw and .fdb are aliases)
AS6100 ASSEMBLER PAGE AF-2
ASSEMBLER SPECIFIC DIRECTIVES
output a 12-Bit value
into a 12-Bit word
.ascii (.asciz and ascis also)
output a sequence of 8-Bit
characters in 12-bit words
A double precision integer (24-Bits) mnemonic has been added:
.dubl (.4byte and .quad are aliases)
output a 24-Bit value
into two 12-bit words
Two new directives have been added to implement 6-bit
character string operations. The characters A-Z and [/]^_ are
masked to values of 0x01 to 0x1F, the characters a-z are masked
to values of 0x01 to 0x1A, and the characters from ' ' (space)
to '?' are masked to 0x20 to 0x3F. All other ascii characters
become a space (0x20).
These are:
.text output upto two characters per 12-bit
word
.textz output upto two characters per 12-bit
word
followed by a 6-bit zero value.
AF.3 MACHINE SPECIFIC DIRECTIVES
The 6100 microprocessor memory architecture consists of 32
pages each having 128 words for a total of 4096 addressable
words. The 6100 instruction set allows direct access only to
the current page and to page 0. Three machine specific direc-
tives provide differing methods to select the memory page.
These directives are:
AS6100 ASSEMBLER PAGE AF-3
MACHINE SPECIFIC DIRECTIVES
AF.3.1 .setpg
Format:
.setpg ; . = next page boundary
.setpg N ; . = Nth page boundary
where: N is the page number from 0 to 31
The .setpg directive is used to set the current program loca-
tion counter to a specific 128 word page boundary or to the next
128 word page boundary and inform the assembler/linker of this
boundary.
AF.3.2 .mempn
Format:
.mempn N ; . = Nth page boundary
where: N is the page number from 0 to 31
The .mempn directive is used to set the current program loca-
tion counter to a specific 128 word page boundary and inform the
assembler/linker of this boundary.
AF.3.3 .mempa
Format:
.mempa A ; . = A (a page boundary)
where: A is a 128 word page address boundary
The .mempa directive is used to set the current program loca-
tion counter to a specific page boundary address and inform the
assembler/linker of this boundary.
AS6100 ASSEMBLER PAGE AF-4
6100 INSTRUCTION SET
AF.4 6100 INSTRUCTION SET
The following tables list all 6100 family mnemonics recog-
nized by the AS6100 assembler. The instruction set is described
in 3 major groupings: Basic Instructions, Operate Microinstruc-
tions, and IOT Instructions.
AF.4.1 Basic Instructions
The basic instructions are:
and Logical AND
tad Binary ADD
isz Increment and skip if zero
dca Deposit and clear AC
jms Jump to subroutine
jmp Jump
These instructions have two paging addressing modes:
addr current page address
*addr page 0 address
which can be combined with an indirect mode signified by an i
argument or enclosing brackets []:
i addr indirect current page
[addr]
i *addr indirect page 0
[*addr] or *[addr]
The 6100 implements an auto-increment mode when accessing ad-
dresses 0x08 - 0x0F in page 0 by incrementing the contents of
the location before using the value as an address.
AS6100 ASSEMBLER PAGE AF-5
6100 INSTRUCTION SET
AF.4.2 Operate Instructions
The operate instructions are split into three groups of mu-
tually exclusive micro operations. The single micro operation
in common with all three groups is:
CLA Clear Accumulator
AF.4.2.1 Group 1 Operate Instructions -
The group 1 microinstructions are used primarily to perform
logical operations on the contents of the accumulator and link:
CLL Clear Link
CMA Complement Accumulator
CML Complement Link
IAC Increment Accumulator
RAL Rotate Accumulator Left
RTL Rotate Two Left
RAR Rotate Accumulator Right
RTR Rotate Two Right
BSW Byte Swap
A group 1 microinstruction can contain one or all of the mnemon-
ics CLA, CLL, CMA, CML, IAC, but only one of the RAL, RTL, RAR,
RTR, or BSW mnemonics (RAL, RTL, RAR, RTR, and BSW are mutually
exclusive).
The NOP (No Operation) functionality can be implemented in
all three operate instruction groups but is specified by the as-
sembler as a group 1 instruction.
Several common group 1 operations have been given their own
mnemonics:
NOP NO Operation
CIA Complement and Increment Accumulator
GLT Get Link
STA Set Accumulator
AS6100 ASSEMBLER PAGE AF-6
6100 INSTRUCTION SET
AF.4.2.2 Group 2 Operate Instructions -
The group 2 microinstructions are used primarily to test the
contents of the accumulator and/or link and then conditionally
skip the next sequential instruction:
HLT Halt
OSR Or With Switch Register
SKP Skip
SNL Skip On Non-Zero Link
SZL Skip On Zero Link
SZA Skip On Zero Accumulator
SNA Skip On Non-Zero Accumulator
SMA Skip On Minus Accumulator
SPA Skip On Plus Accumulator
A group 2 microinstruction can contain one or all of the mnemon-
ics CLA, HLT, OSR, but only one of the SKP, SNL, SZL, SZA, SNA,
SMA, or SPA mnemonics (SKP, SNL, SZL, SZA, SNA, SMA, and SPA are
mutually exclusive).
One common group 2 operation has been given its own mnemonic:
LAS Load Accumulator With Switch Register
AF.4.2.3 Group 3 Operate Instructions -
The group 3 microinstructions perform logical operations on
the contents of AC and MQ.
MQL MQ Register Load
MQA MQ Register Into Accumulator
A group 3 microinstruction can contain one or all of the mnemon-
ics CLA, MQL, and MQA.
Several common group 3 operations have been given their own
mnemonics:
SWP Swap Accumulator and MQ Register
CAM Clear Accumulator and MQ Register
ACL Clear Accumulator and Load
MQ Register into Accumulator
AS6100 ASSEMBLER PAGE AF-7
6100 INSTRUCTION SET
AF.4.2.4 Group Errors -
The 6100 assembler has three additional error codes which oc-
cur when the group 1, 2, or 3 operations are mixed. The error
code will be <1>, <2>, or <3> based upon the first group type
encountered followed by any other type of group operation. The
CLA operation is valid with all groups and does not cause an er-
ror code to be generated.
AF.4.3 Input/Output (IOT) Instructions
The input/output transfer instructions are used to control
the operation of peripherals and transfer data between peri-
pherals and the 6100 microprocessor. Of the lower 9 bits of the
instruction used for device selection and control typically the
3 LSBs are the I/O operation bits and the remaining 6 bits
select the peripheral device.
IOT DEV,CMND
where DEV is the device select code and
CMND is the command code.
Specifying a device select code of zero in the IOT instruction
allows the user program to control the interrupt mechanism of
the 6100 microprocessor. These instructions are:
SKON Skip If Interrupt On
ION Interrupt Turn On
IOF Interrupt Turn Off
SRQ Skip If Int Request
GTF GetFlags
RTF Return Flags
SGT Defined By Device Logic
CAF Clear All Flags
APPENDIX AG
AS61860 ASSEMBLER
AG.1 ACKNOWLEDGMENT
Thanks to Edgar Puehringer for his contribution of the
AS61860 cross assembler.
Edgar Peuhringer
edgar_pue at yahoo dot com
AG.2 61860 REGISTER SET
The SC61860 from Sharp has 96 bytes of internal RAM which are
used as registers and hardware stack. The last four bytes of
the internal RAM are special purpose registers (I/O, timers
...). Here is a list of the 61860 registers:
Reg Address Common use
--- ------- ----------
i, j 0, 1 Length of block operations
a, b 2, 3 Accumulator
xl, xh 4, 5 Pointer for read operations
yl, yh 6, 7 Pointer for write operations
k - n 8 - 0x0b General purpose (counters ...)
- 0x0c - 0x5b Stack
ia 0x5c Inport A
ib 0x5d Inport B
fo 0x5e Outport F
cout 0x5f Control port
Other parts of the 61860 are the 16 bit program counter (pc)
and 16 bit data pointer (dp). The ALU has a carry flag (c) and
AS61860 ASSEMBLER PAGE AG-2
61860 REGISTER SET
a zero flag (z). There is an internal register d which can't be
accessed with machine instructions. It is filled from i or j
when executing block operations.
In addition there are three 7 bit registers p, q, and r which
are used to address the internal RAM (r is the stack pointer, p
and q are used for block operations).
AG.3 PROCESSOR SPECIFIC DIRECTIVES
The AS61860 cross assembler has two (2) processor specific
assembler directives which are used for the etc mnemonic (which
is a kind of a built-in switch/case statement):
.default A 16 bit address (same as .dw)
.case One byte followed by a 16 bit address
Here is an example how this should be used (cut from a lst
file)::
022B 7A 05 02 18 614 PTC 0x05, CONT16
022F 69 615 DTC
0230 4C 01 25 616 .CASE 0x4C, SLOADI
0233 4D 01 2F 617 .CASE 0x4D, SMERGI
0236 51 01 D2 618 .CASE 0x51, QUITI
0239 53 00 CD 619 .CASE 0x53, LLISTI
023C 56 01 D5 620 .CASE 0x56, VERI
023F 01 D1 621 .DEFAULT CONT9
AG.4 61860 INSTRUCTION SET
The following tables list all 61860 family mnemonics recog-
nized by the AS61860 assembler. Most of the mnemonics are con-
verted into 8 bit machine instructions with no argument or a
one- or two-byte argument. There are some exceptions for this:
Mnemonic Description
-------- -----------
jp 2 bit instruction, 6 bit argument
cal 3 bit instruction, 13 bit argument
ptc *) 1 byte instruction, 3 byte argument
dtc *) 1 byte instruction, n bytes argument
*) Not mentioned in the CPU specification from Sharp
AS61860 ASSEMBLER PAGE AG-3
61860 INSTRUCTION SET
AG.4.1 Load Immediate Register
LII n (n --> I)
LIJ n
LIA n
LIB n
LIP n
LIQ n
LIDP nm
LIDL n (DL is the low byte of DP)
LP (One byte version of LIP)
RA (Same as LIA 0, but only one byte)
CLRA (synonym for RA)
AG.4.2 Load Accumulator
LDP (P --> A)
LDQ
LDR
LDM ((P) --> A)
LDD ((DP) --> A)
AG.4.3 Store Accumulator
STP (A --> P)
STQ
STR
STD (A --> (DP))
AG.4.4 Move Data
MVDM ((P) --> (DP))
MVMD ((DP) --> (P))
AS61860 ASSEMBLER PAGE AG-4
61860 INSTRUCTION SET
AG.4.5 Exchange Data
EXAB (A <--> B)
EXAM (A <--> (P))
AG.4.6 Stack Operations
PUSH (R - 1 --> R, A --> (R))
POP ((R) --> A, R + 1 --> R)
LEAVE (0 --> (R))
AG.4.7 Block Move Data
MVW ((Q) --> (P), I+1 bytes)
MVB ((Q) --> (P), J+1 bytes)
MVWD ((DP) --> (P), I+1 bytes)
MVBD ((DP) --> (P), J+1 bytes)
DATA ((B,A) --> (P), I+1 bytes,
reads CPU ROM also)
AG.4.8 Block Exchange Data
EXW ((Q) <--> (P), I+1 bytes)
EXB ((Q) <--> (P), J+1 bytes)
EXWD ((DP) <--> (P), I+1 bytes)
EXBD ((DP) <--> (P), J+1 bytes)
AS61860 ASSEMBLER PAGE AG-5
61860 INSTRUCTION SET
AG.4.9 Increment and Decrement
INCP (P + 1 --> P)
DECP
INCI
DECI
INCJ
DECJ
INCA
DECA
INCB
DECB
INCK
DECK
INCL
DECL
IX (X + 1 --> X, X --> DP)
DX
IY
DY
INCM *)
DECM *)
INCN *)
DECN *)
*) Not mentioned in the CPU specification from Sharp
AG.4.10 Increment/Decrement with Load/Store
IXL (Same as IX plus LDD)
DXL
IYS (Same as IY plus STD)
DYS
AS61860 ASSEMBLER PAGE AG-6
61860 INSTRUCTION SET
AG.4.11 Fill
FILM (A --> (P), I+1 bytes)
FILD (A --> (DP), I+1 bytes)
AG.4.12 Addition and Subtraction
ADIA n (A + n --> A)
SBIA n
ADIM n ((P) + n --> (P))
SBIM n
ADM n ((P) + A --> (P))
SBM n
ADCM n ((P) + A --> (P), with carry)
SBCM
ADB (like ADM, but 16 bit)
SBB
ADN (like ADM, BCD addition, I+1 bytes)
SBN
ADW ((P) + (Q) --> (P), BCD, I+1 bytes)
SBW
AG.4.13 Shift Operations
SRW (shift I+1 bytes in (P) 4 bits right)
SLW
SR (shift A 1 bit, with carry)
SL
SWP (exchange low and high nibble of A)
AG.4.14 Boolean Operations
ANIA n (A & n --> A)
ORIA n
ANIM n ((P) & n --> (P))
ORIM n
ANID n ((DP) & n --> (DP))
ORID n
ANMA ((P) & A --> (P))
ORMA
AS61860 ASSEMBLER PAGE AG-7
61860 INSTRUCTION SET
AG.4.15 Compare
CPIA n (A - n --> c,z)
CPIM n ((P) - n --> c,z)
CPMA ((P) - A --> c,z)
TSIA n (A & n --> z)
TSIM n ((P) & n --> z)
TSID n ((DP) & n --> z)
TSIP ((P) & A --> z)
AG.4.16 CPU Control
SC (Set carry)
RC
NOPW (no op)
NOPT
WAIT n (wait 6+n cycles)
WAITJ (wait 5+4*I cycles)
CUP (synonym for WAITJ)
AG.4.17 Absolute Jumps
JP nm
JPZ nm (on zero)
JPNZ nm
JPC nm
JPNC nm
PTC/DTC (see 'Processor Specific Directives')
PTJ/DTJ (synonym for PTD/DTC)
CPCAL/DTLRA (synonym for PTC/DTC)
CASE1/CASE2 (synonym for PTC/DTC)
SETT/JST (synonym for PTC/DTC)
AS61860 ASSEMBLER PAGE AG-8
61860 INSTRUCTION SET
AG.4.18 Relative Jumps
These operations handle a jump relative to PC forward and
back with a maximum distance of 255 byte. The assembler
resolves 16 bit addresses to to 8 bit relative adresses. If the
target address is to far away, an error will be generated. Note
that relative jumps need 1 byte less than absolute jumps.
JRP nm
JRZP nm
JRNZP nm (jump relative non zero plus direction)
JRCP nm
JRNCP nm
JRM nm
JRZM nm
JRNZM nm
JRCM nm (jump relative on carry minus direction)
JRNCM nm
LOOP nm (decrements (R) and makes a JRNCM)
AG.4.19 Calls
CALL nm
CAL nm (nm must be <= 0x1fff,
1 byte less code than CALL)
RTN
AG.4.20 Input and output
INA (IA --> A)
INB
OUTA
OUTB
OUTF (A --> FO)
OUTC (control port)
TEST n (timers, pins & n --> z)
AS61860 ASSEMBLER PAGE AG-9
61860 INSTRUCTION SET
AG.4.21 Unknown Commands
READ ((PC+1) -> A)
READM ((PC+1) -> (P))
WRIT (???)
APPENDIX AH
AS6500 ASSEMBLER
AH.1 ACKNOWLEDGMENT
Thanks to Marko Makela for his contribution of the AS6500
cross assembler.
Marko Makela
Sillitie 10 A
01480 Vantaa
Finland
Internet: Marko dot Makela at Helsinki dot Fi
EARN/BitNet: msmakela at finuh
Several additions and modifications were made to his code to
support the following families of 6500 processors:
(1) 650X and 651X processor family
(2) 65F11 and 65F12 processor family
(3) 65C00/21 and 65C29 processor family
(4) 65C02, 65C102, and 65C112 processor family
The instruction syntax of this cross assembler contains two
peculiarities: (1) the addressing indirection is denoted by the
square brackets, [], or parenthesis, (), and (2) the `bbrx' and
`bbsx' instructions are written `bbr0 memory,label'.
AS6500 ASSEMBLER PAGE AH-2
ACKNOWLEDGMENT
AH.2 .enabl and .dsabl Directives
Format:
.enabl (arg1, arg2, ...)
.dsabl (arg1, arg2, ...)
where: arg1, arg2, ... represent one or more
of the following options
autodpcnst Automatic Direct Paging For Constants
autodpsmbl Automatic Direct Paging For Symbols
autodpcnst: controls whether constants within the range of
0x0000-0x00FF (paging region) or external are automatically as-
sembled as paged variables. The paging area must have been
specified for this option to take effect. The default is
enabled.
autodpsmbl: controls whether symbols within the range of
0x0000-0x00FF (paging region) or external are automatically as-
sembled as paged variables. The paging area must have been
specified for this option to take effect. The default is
enabled.
AH.3 .dpgbl Directive
Format:
.dpgbl arg1, arg2, ...
Where the arguments are labels or
symbols with values that are in the
0x0000-0x00FF direct page. If the
page area has not been specified
then the arguments are defined as
being in the current area.
AS6500 ASSEMBLER PAGE AH-3
6500 REGISTER SET
AH.4 6500 REGISTER SET
The following is a list of the 6500 registers used by AS6500:
a - 8-bit accumulator
x,y - index registers
AH.5 6500 INSTRUCTION SET
The following list specifies the format for each addressing
mode supported by AS6500:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
offset,x indexed addressing
offset,y indexed addressing
address = (offset + (x or y))
[offset,x] or pre-indexed indirect addressing
(offset,x) 0 <= offset <= 255
address = contents of location
(offset + (x or y)) mod 256
[offset],y or post-indexed indirect addressing
(offset),y address = contents of location at offset
plus the value of the y register
[address] or indirect addressing
(address)
ext extended addressing
label branch label
address,label direct page memory location
branch label
bbrx and bbsx instruction addressing
The terms data, dir, offset, address, ext, and label may all be
expressions.
AS6500 ASSEMBLER PAGE AH-4
6500 INSTRUCTION SET
Note that not all addressing modes are valid with every in-
struction, refer to the 65xx technical data for valid modes.
AH.5.1 Processor Specific Directives
The AS6500 cross assembler has four (4) processor specific
assembler directives which define the target 65xx processor
family:
.r6500 Core 650X and 651X family (default)
.r65f11 Core plus 65F11 and 65F12
.r65c00 Core plus 65C00/21 and 65C29
.r65c02 Core plus 65C02, 65C102, and 65C112
AH.5.2 65xx Core Inherent Instructions
The following tables list all 6500 family mnemonics recog-
nized by the AS6500 assembler. The designation [] refers to a
required addressing mode argument.
brk clc
cld cli
clv dex
dey inx
iny nop
pha php
pla plp
rti rts
sec sed
sei tax
tay tsx
txa txs
tya
AS6500 ASSEMBLER PAGE AH-5
6500 INSTRUCTION SET
AH.5.3 65xx Core Branch Instructions
bcc label bhs label
bcs label blo label
beq label bmi label
bne label bpl label
bvc label bvs label
AH.5.4 65xx Core Single Operand Instructions
asl []
dec []
inc []
lsr []
rol []
ror []
AH.5.5 65xx Core Double Operand Instructions
adc []
and []
bit []
cmp []
eor []
lda []
ora []
sbc []
sta []
AH.5.6 65xx Core Jump and Jump to Subroutine Instructions
jmp [] jsr []
AH.5.7 65xx Core Miscellaneous X and Y Register Instructions
cpx []
cpy []
ldx []
stx []
ldy []
sty []
AS6500 ASSEMBLER PAGE AH-6
6500 INSTRUCTION SET
AH.5.8 65F11 and 65F12 Specific Instructions
bbr0 [],label bbr1 [],label
bbr2 [],label bbr3 [],label
bbr4 [],label bbr5 [],label
bbr6 [],label bbr7 [],label
bbs0 [],label bbs1 [],label
bbs2 [],label bbs3 [],label
bbs4 [],label bbs5 [],label
bbs6 [],label bbs7 [],label
rmb0 [] rmb1 []
rmb2 [] rmb3 []
rmb4 [] rmb5 []
rmb6 [] rmb7 []
smb0 [] smb1 []
smb2 [] smb3 []
smb4 [] smb5 []
smb6 [] smb7 []
AH.5.9 65C00/21 and 65C29 Specific Instructions
bbr0 [],label bbr1 [],label
bbr2 [],label bbr3 [],label
bbr4 [],label bbr5 [],label
bbr6 [],label bbr7 [],label
bbs0 [],label bbs1 [],label
bbs2 [],label bbs3 [],label
bbs4 [],label bbs5 [],label
bbs6 [],label bbs7 [],label
bra label
phx phy
plx ply
rmb0 [] rmb1 []
rmb2 [] rmb3 []
rmb4 [] rmb5 []
rmb6 [] rmb7 []
smb0 [] smb1 []
smb2 [] smb3 []
smb4 [] smb5 []
smb6 [] smb7 []
AS6500 ASSEMBLER PAGE AH-7
6500 INSTRUCTION SET
AH.5.10 65C02, 65C102, and 65C112 Specific Instructions
bbr0 [],label bbr1 [],label
bbr2 [],label bbr3 [],label
bbr4 [],label bbr5 [],label
bbr6 [],label bbr7 [],label
bbs0 [],label bbs1 [],label
bbs2 [],label bbs3 [],label
bbs4 [],label bbs5 [],label
bbs6 [],label bbs7 [],label
bra label
phx phy
plx ply
rmb0 [] rmb1 []
rmb2 [] rmb3 []
rmb4 [] rmb5 []
rmb6 [] rmb7 []
smb0 [] smb1 []
smb2 [] smb3 []
smb4 [] smb5 []
smb6 [] smb7 []
stz []
trb []
tsb []
Additional addressing modes for the following core instruc-
tions are also available with the 65C02, 65C102, and 65C112 pro-
cessors.
adc [] and []
cmp [] eor []
lda [] ora []
sbc [] sta []
bit [] jmp []
dec [] inc []
APPENDIX AI
AS6800 ASSEMBLER
AI.1 6800 REGISTER SET
The following is a list of the 6800 registers used by AS6800:
a,b - 8-bit accumulators
x - index register
AI.2 6800 INSTRUCTION SET
The following tables list all 6800/6802/6808 mnemonics recog-
nized by the AS6800 assembler. The designation [] refers to a
required addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6800:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
AS6800 ASSEMBLER PAGE AI-2
6800 INSTRUCTION SET
The terms data, dir, offset, ext, and label may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6800 technical data for valid modes.
AI.2.1 Inherent Instructions
aba cba
clc cli
clv daa
des dex
ins inx
nop rti
rts sba
sec sei
sev swi
tab tap
tba tpa
tsx txs
wai
psha pshb
psh a psh b
pula pulb
pul a pul b
AI.2.2 Branch Instructions
bra label bhi label
bls label bcc label
bhs label bcs label
blo label bne label
beq label bvc label
bvs label bpl label
bmi label bge label
blt label bgt label
ble label bsr label
AS6800 ASSEMBLER PAGE AI-3
6800 INSTRUCTION SET
AI.2.3 Single Operand Instructions
asla aslb
asl a asl b
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr []
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
inca incb
inc a inc b
inc []
lsla lslb
lsl a lsl b
lsl []
lsra lsrb
lsr a lsr b
lsr []
nega negb
neg a neg b
neg []
rola rolb
rol a rol b
rol []
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
AS6800 ASSEMBLER PAGE AI-4
6800 INSTRUCTION SET
AI.2.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb []
add a [] add b []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
eora [] eorb []
eor a [] eor b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb []
sub a [] sub b []
AI.2.5 Jump and Jump to Subroutine Instructions
jmp [] jsr []
AS6800 ASSEMBLER PAGE AI-5
6800 INSTRUCTION SET
AI.2.6 Long Register Instructions
cpx []
lds [] sts []
ldx [] stx []
APPENDIX AJ
AS6801 ASSEMBLER
AJ.1 .hd6303 DIRECTIVE
Format:
.hd6303
The .hd6303 directive enables processing of the HD6303 specific
mnemonics not included in the 6801 instruction set. HD6303
mnemonics encountered without the .hd6303 directive will be
flagged with an error.
AJ.2 6801 REGISTER SET
The following is a list of the 6801 registers used by AS6801:
a,b - 8-bit accumulators
d - 16-bit accumulator
x - index register
AJ.3 6801 INSTRUCTION SET
The following tables list all 6801/6803/6303 mnemonics recog-
nized by the AS6801 assembler. The designation [] refers to a
required addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6801:
#data immediate data
byte or word data
*dir direct page addressing
AS6801 ASSEMBLER PAGE AJ-2
6801 INSTRUCTION SET
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
The terms data, dir, offset, ext, and label may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6801/6303 technical data for valid
modes.
AJ.3.1 Inherent Instructions
aba abx
cba clc
cli clv
daa des
dex ins
inx mul
nop rti
rts sba
sec sei
sev swi
tab tap
tba tpa
tsx txs
wai
AS6801 ASSEMBLER PAGE AJ-3
6801 INSTRUCTION SET
AJ.3.2 Branch Instructions
bra label brn label
bhi label bls label
bcc label bhs label
bcs label blo label
bne label beq label
bvc label bvs label
bpl label bmi label
bge label blt label
bgt label ble label
bsr label
AJ.3.3 Single Operand Instructions
asla aslb asld
asl a asl b asl d
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr []
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
eora eorb
eor a eor b
eor []
inca incb
inc a inc b
inc []
lsla lslb lsld
lsl a lsl b lsl d
lsl []
lsra lsrb lsrd
AS6801 ASSEMBLER PAGE AJ-4
6801 INSTRUCTION SET
lsr a lsr b lsr d
lsr []
nega negb
neg a neg b
neg []
psha pshb pshx
psh a psh b psh x
pula pulb pulx
pul a pul b pul x
rola rolb
rol a rol b
rol []
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
AS6801 ASSEMBLER PAGE AJ-5
6801 INSTRUCTION SET
AJ.3.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb [] addd []
add a [] add b [] add d []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb [] subd []
sub a [] sub b [] sub d []
AJ.3.5 Jump and Jump to Subroutine Instructions
jmp [] jsr []
AS6801 ASSEMBLER PAGE AJ-6
6801 INSTRUCTION SET
AJ.3.6 Long Register Instructions
cpx [] ldd []
lds [] ldx []
std [] sts []
stx []
AJ.3.7 6303 Specific Instructions
aim #data, [] eim #data, []
oim #data, [] tim #data, []
xgdx slp
APPENDIX AK
AS6804 ASSEMBLER
Requires the .setdp directive to specify the ram area.
AK.1 6804 REGISTER SET
The following is a list of the 6804 registers used by AS6804:
x,y - index registers
AK.2 6804 INSTRUCTION SET
The following tables list all 6804 mnemonics recognized by
the AS6804 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6804:
#data immediate data
byte or word data
,x register indirect addressing
dir direct addressing
(see .setdp directive)
0 <= dir <= 255
ext extended addressing
label branch label
The terms data, dir, and ext may be expressions. The label for
the short branchs beq, bne, bcc, and bcs must not be external.
AS6804 ASSEMBLER PAGE AK-2
6804 INSTRUCTION SET
Note that not all addressing modes are valid with every in-
struction, refer to the 6804 technical data for valid modes.
AK.2.1 Inherent Instructions
coma decx
decy incx
incy rola
rti rts
stop tax
tay txa
tya wait
AK.2.2 Branch Instructions
bne label beq label
bcc label bcs label
AK.2.3 Single Operand Instructions
add []
and []
cmp []
dec []
inc []
lda []
sta []
sub []
AK.2.4 Jump and Jump to Subroutine Instructions
jsr []
jmp []
AS6804 ASSEMBLER PAGE AK-3
6804 INSTRUCTION SET
AK.2.5 Bit Test Instructions
brclr #data,[],label
brset #data,[],label
bclr #label,[]
bset #label,[]
AK.2.6 Load Immediate data Instruction
mvi [],#data
AK.2.7 6804 Derived Instructions
asla
bam label
bap label
bxmi label
bxpl label
bymi label
bypl label
clra
clrx
clry
deca
decx
decy
inca
incx
incy
ldxi #data
ldyi #data
nop
tax
tay
txa
tya
APPENDIX AL
AS68(HC)05 ASSEMBLER
AL.1 .6805 DIRECTIVE
Format:
.6805
The .6805 directive selects the MC6805 specific cycles count to
be output.
AL.2 .hc05 DIRECTIVE
Format:
.hc05
The .hc05 directive selects the MC68HC05/146805 specific cycles
count to be output.
AL.3 THE .__.CPU. VARIABLE
The value of the pre-defined symbol '.__.CPU.' corresponds to
the selected processor type. The default value is 0 which cor-
responds to the default processor type. The following table
lists the processor types and associated values for the ASZ80
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.6805 0
.hc05 1
AS68(HC)05 ASSEMBLER PAGE AL-2
THE .__.CPU. VARIABLE
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that separately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AL.4 6805 REGISTER SET
The following is a list of the 6805 registers used by AS6805:
a - 8-bit accumulator
x - index register
AL.5 6805 INSTRUCTION SET
The following tables list all 6805 mnemonics recognized by
the AS6805 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6805:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
ext extended addressing
AS68(HC)05 ASSEMBLER PAGE AL-3
6805 INSTRUCTION SET
label branch label
The terms data, dir, offset, and ext may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6805 technical data for valid modes.
AL.5.1 Control Instructions
clc cli
nop rsp
rti rts
sec sei
stop swi
tax txa
wait
AL.5.2 Bit Manipulation Instructions
brset #data,*dir,label
brclr #data,*dir,label
bset #data,*dir
bclr #data,*dir
AL.5.3 Branch Instructions
bra label brn label
bhi label bls label
bcc label bcs label
bne label beq label
bhcc label bhcs label
bpl label bmi label
bmc label bms label
bil label bih label
bsr label
AS68(HC)05 ASSEMBLER PAGE AL-4
6805 INSTRUCTION SET
AL.5.4 Read-Modify-Write Instructions
nega negx
neg []
coma comx
com []
lsra lsrx
lsr []
rora rorx
ror []
asra asrx
asr []
lsla lslx
lsl []
rola rolx
rol []
deca decx
dec []
inca incx
inc []
tsta tstx
tst []
clra clrx
clr []
AL.5.5 Register\Memory Instructions
sub [] cmp []
sbc [] cpx []
and [] bit []
lda [] sta []
eor [] adc []
ora [] add []
ldx [] stx []
AS68(HC)05 ASSEMBLER PAGE AL-5
6805 INSTRUCTION SET
AL.5.6 Jump and Jump to Subroutine Instructions
jmp [] jsr []
APPENDIX AM
AS68(HC[S])08 ASSEMBLER
AM.1 PROCESSOR SPECIFIC DIRECTIVES
The MC68HC(S)08 processor is a superset of the MC6805 proces-
sors. The AS6808 assembler supports the HC08, HCS08, 6805, and
HC05 cores.
AM.1.1 .hc08 Directive
Format:
.hc08
The .hc08 directive enables processing of only the HC08 specific
mnemonics. 6805/HC05/HCS08 mnemonics encountered without the
.hc08 directive will be flagged with an error.
The .hc08 directive also selects the HC08 specific cycles
count to be output.
AS68(HC[S])08 ASSEMBLER PAGE AM-2
PROCESSOR SPECIFIC DIRECTIVES
AM.1.2 .hcs08 Directive
Format:
.hcs08
The .hcs08 directive enables processing of the HCS08 specific
mnemonics.
The .hcs08 directive also selects the HCS08 specific cycles
count to be output.
AM.1.3 .6805 Directive
Format:
.6805
The .6805 directive enables processing of only the 6805/HC05
specific mnemonics. HC08/HCS08 mnemonics encountered without
the .hc08/.hcs08 directives will be flagged with an error.
The .6805 directive also selects the MC6805 specific cycles
count to be output.
AM.1.4 .hc05 Directive
Format:
.hc05
The .hc05 directive enables processing of only the 6805/HC05
specific mnemonics. HC08/HCS08 mnemonics encountered without
the .hc08/.hcs08 directives will be flagged with an error.
The .hc05 directive also selects the MC68HC05/146805 specific
cycles count to be output.
AS68(HC[S])08 ASSEMBLER PAGE AM-3
PROCESSOR SPECIFIC DIRECTIVES
AM.1.5 The .__.CPU. Variable
The value of the pre-defined symbol '.__.CPU.' corresponds to
the selected processor type. The default value is 0 which cor-
responds to the default processor type. The following table
lists the processor types and associated values for the AS6808
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.hc08 0
.hcs08 1
.6805 2
.hc05 3
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that separately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AM.2 68HC(S)08 REGISTER SET
The following is a list of the 68HC(S)08 registers used by
AS6808:
a - 8-bit accumulator
x - index register
s - stack pointer
AS68(HC[S])08 ASSEMBLER PAGE AM-4
68HC(S)08 INSTRUCTION SET
AM.3 68HC(S)08 INSTRUCTION SET
The following tables list all 68HC(S)08 mnemonics recognized
by the AS6808 assembler. The designation [] refers to a re-
quired addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6808:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indexed addressing
zero offset
offset,x register indexed addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
,x+ register indexed addressing
zero offset with post increment
offset,x+ register indexed addressing
unsigned byte offset with post increment
offset,s stack pointer indexed addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
ext extended addressing
label branch label
The terms data, dir, offset, and ext may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 68HC(S)08 technical data for valid
modes.
AS68(HC[S])08 ASSEMBLER PAGE AM-5
68HC(S)08 INSTRUCTION SET
AM.3.1 Control Instructions
clc cli daa div
mul nop nsa psha
pshh pshx pula pulh
pulx rsp rti rts
sec sei stop swi
tap tax tpa tsx
txa txs wait
AM.3.2 Bit Manipulation Instructions
brset #data,*dir,label
brclr #data,*dir,label
bset #data,*dir
bclr #data,*dir
AM.3.3 Branch Instructions
bra label brn label
bhi label bls label
bcc label bcs label
bne label beq label
bhcc label bhcs label
bpl label bmi label
bmc label bms label
bil label bih label
bsr label bge label
blt label bgt label
ble label
AM.3.4 Complex Branch Instructions
cbeqa [],label
cbeqx [],label
cbeq [],label
dbnza label
dbnzx label
dbnz [],label
AS68(HC[S])08 ASSEMBLER PAGE AM-6
68HC(S)08 INSTRUCTION SET
AM.3.5 Read-Modify-Write Instructions
nega negx
neg []
coma comx
com []
lsra lsrx
lsr []
rora rorx
ror []
asra asrx
asr []
asla aslx
asl []
lsla lslx
lsl []
rola rolx
rol []
deca decx
dec []
inca incx
inc []
tsta tstx
tst []
clra clrx
clr [] clrh
aix #data
ais #data
AS68(HC[S])08 ASSEMBLER PAGE AM-7
68HC(S)08 INSTRUCTION SET
AM.3.6 Register\Memory Instructions
sub [] cmp []
sbc [] cpx []
and [] bit []
lda [] sta []
eor [] adc []
ora [] add []
ldx [] stx []
AM.3.7 Double Operand Move Instruction
mov [],[]
AM.3.8 16-Bit Index Register Instructions
cphx []
ldhx []
sthx []
AM.3.9 Jump and Jump to Subroutine Instructions
jmp [] jsr []
APPENDIX AN
AS6809 ASSEMBLER
AN.1 6809 REGISTER SET
The following is a list of the 6809 registers used by AS6809:
a,b - 8-bit accumulators
d - 16-bit accumulator
x,y - index registers
s,u - stack pointers
pc - program counter
cc - condition code
dp - direct page
AN.2 6809 INSTRUCTION SET
The following tables list all 6809 mnemonics recognized by
the AS6809 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6809:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
label branch label
r,r1,r2 registers
cc,a,b,d,dp,x,y,s,u,pc
AS6809 ASSEMBLER PAGE AN-2
6809 INSTRUCTION SET
,-x ,--x register indexed
autodecrement
,x+ ,x++ register indexed
autoincrement
,x register indexed addressing
zero offset
offset,x register indexed addressing
-16 <= offset <= 15 --- 5-bit
-128 <= offset <= -17 --- 8-bit
16 <= offset <= 127 --- 8-bit
-32768 <= offset <= -129 --- 16-bit
128 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
a,x accumulator offset indexed addressing
ext extended addressing
ext,pc pc addressing ( pc <- pc + ext )
ext,pcr pc relative addressing
[,--x] register indexed indirect
autodecrement
[,x++] register indexed indirect
autoincrement
[,x] register indexed indirect addressing
zero offset
[offset,x] register indexed indirect addressing
-128 <= offset <= 127 --- 8-bit
-32768 <= offset <= -129 --- 16-bit
128 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
[a,x] accumulator offset indexed
indirect addressing
[ext] extended indirect addressing
[ext,pc] pc indirect addressing
( [pc <- pc + ext] )
AS6809 ASSEMBLER PAGE AN-3
6809 INSTRUCTION SET
[ext,pcr] pc relative indirect addressing
The terms data, dir, label, offset, and ext may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6809 technical data for valid modes.
AN.2.1 Inherent Instructions
abx daa
mul nop
rti rts
sex swi
swi1 swi2
swi3 sync
AN.2.2 Short Branch Instructions
bcc label bcs label
beq label bge label
bgt label bhi label
bhis label bhs label
ble label blo label
blos label bls label
blt label bmi label
bne label bpl label
bra label brn label
bvc label bvs label
bsr label
AS6809 ASSEMBLER PAGE AN-4
6809 INSTRUCTION SET
AN.2.3 Long Branch Instructions
lbcc label lbcs label
lbeq label lbge label
lbgt label lbhi label
lbhis label lbhs label
lble label lblo label
lblos label lbls label
lblt label lbmi label
lbne label lbpl label
lbra label lbrn label
lbvc label lbvs label
lbsr label
AS6809 ASSEMBLER PAGE AN-5
6809 INSTRUCTION SET
AN.2.4 Single Operand Instructions
asla aslb
asl []
asra asrb
asr []
clra clrb
clr []
coma comb
com []
deca decb
dec []
inca incb
inc []
lsla lslb
lsl []
lsra lsrb
lsr []
nega negb
neg []
rola rolb
rol []
rora rorb
ror []
tsta tstb
tst []
AS6809 ASSEMBLER PAGE AN-6
6809 INSTRUCTION SET
AN.2.5 Double Operand Instructions
adca [] adcb []
adda [] addb []
anda [] andb []
bita [] bitb []
cmpa [] cmpb []
eora [] eorb []
lda [] ldb []
ora [] orb []
sbca [] sbcb []
sta [] stb []
suba [] subb []
AN.2.6 D-register Instructions
addd [] subd []
cmpd [] ldd []
std []
AS6809 ASSEMBLER PAGE AN-7
6809 INSTRUCTION SET
AN.2.7 Index/Stack Register Instructions
cmps [] cmpu []
cmpx [] cmpy []
lds [] ldu []
ldx [] ldy []
leas [] leau []
leax [] leay []
sts [] stu []
stx [] sty []
pshs r pshu r
puls r pulu r
AN.2.8 Jump and Jump to Subroutine Instructions
jmp [] jsr []
AN.2.9 Register - Register Instructions
exg r1,r2 tfr r1,r2
AN.2.10 Condition Code Register Instructions
andcc #data orcc #data
cwai #data
AS6809 ASSEMBLER PAGE AN-8
6809 INSTRUCTION SET
AN.2.11 6800 Compatibility Instructions
aba cba
clc cli
clv des
dex ins
inx
ldaa [] ldab []
oraa [] orab []
psha pshb
pula pulb
sba sec
sei sev
staa [] stab []
tab tap
tba tpa
tsx txs
wai
APPENDIX AO
AS6811 ASSEMBLER
AO.1 68HC11 REGISTER SET
The following is a list of the 68HC11 registers used by AS6811:
a,b - 8-bit accumulators
d - 16-bit accumulator
x,y - index registers
AO.2 68HC11 INSTRUCTION SET
The following tables list all 68HC11 mnemonics recognized by
the AS6811 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6811:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
AS6811 ASSEMBLER PAGE AO-2
68HC11 INSTRUCTION SET
The terms data, dir, offset, and ext may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 68HC11 technical data for valid modes.
AO.2.1 Inherent Instructions
aba abx
aby cba
clc cli
clv daa
des dex
dey fdiv
idiv ins
inx iny
mul nop
rti rts
sba sec
sei sev
stop swi
tab tap
tba tpa
tsx txs
wai xgdx
xgdy
psha pshb
psh a psh b
pshx pshy
psh x psh y
pula pulb
pul a pul b
pulx puly
pul x pul y
AS6811 ASSEMBLER PAGE AO-3
68HC11 INSTRUCTION SET
AO.2.2 Branch Instructions
bra label brn label
bhi label bls label
bcc label bhs label
bcs label blo label
bne label beq label
bvc label bvs label
bpl label bmi label
bge label blt label
bgt label ble label
bsr label
AS6811 ASSEMBLER PAGE AO-4
68HC11 INSTRUCTION SET
AO.2.3 Single Operand Instructions
asla aslb asld
asl a asl b asl d
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr label
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
inca incb
inc a inc b
inc []
lsla lslb lsld
lsl a lsl b lsl d
lsl []
lsra lsrb lsrd
lsr a lsr b lsr d
lsr []
nega negb
neg a neg b
neg []
rola rolb
rol a rol b
rol []
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
AS6811 ASSEMBLER PAGE AO-5
68HC11 INSTRUCTION SET
AO.2.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb [] addd []
add a [] add b [] add d []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
eora [] eorb []
eor a [] eor b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb [] subd []
sub a [] sub b [] sub d []
AO.2.5 Bit Manupulation Instructions
bclr [],#data
bset [],#data
brclr [],#data,label
brset [],#data,label
AS6811 ASSEMBLER PAGE AO-6
68HC11 INSTRUCTION SET
AO.2.6 Jump and Jump to Subroutine Instructions
jmp [] jsr []
AO.2.7 Long Register Instructions
cpx [] cpy []
ldd [] lds []
ldx [] ldy []
std [] sts []
stx [] sty []
APPENDIX AP
AS68(HC[S])12 ASSEMBLER
AP.1 PROCESSOR SPECIFIC DIRECTIVES
The AS6812 assembler supports the 68HC(S)12 series of
microprocessors which includes the 68HC(S)8xx and 68HC(S)9xx
series.
AP.1.1 .hc12 Directive
Format:
.hc12
The .hc12 directive selects the HC12 core specific cycles count
to be output.
AP.1.2 .hcs12 Directive
Format:
.hcs12
The .hcs12 directive selects the HCS12 core specific cycles
count to be output.
AS68(HC[S])12 ASSEMBLER PAGE AP-2
PROCESSOR SPECIFIC DIRECTIVES
AP.1.3 The .__.CPU. Variable
The value of the pre-defined symbol '.__.CPU.' corresponds to
the selected processor type. The default value is 0 which cor-
responds to the default processor type. The following table
lists the processor types and associated values for the AS6812
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.hc12 0
.hcs12 1
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that separately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AP.2 68HC(S)12 REGISTER SET
The following is a list of the 68HC(S)12 registers used by
AS6812:
a,b - 8-bit accumulators
d - 16-bit accumulator
x,y - index registers
sp,s - stack pointer
pc - program counter
ccr,cc - condition code register
AS68(HC[S])12 ASSEMBLER PAGE AP-3
68HC(S)12 INSTRUCTION SET
AP.3 68HC(S)12 INSTRUCTION SET
The following tables list all 68HC(S)12 mnemonics recognized
by the AS6812 assembler. The designation [] refers to a re-
quired addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6812:
#data immediate data
byte or word data
ext extended addressing
pg memory page number
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
label branch label
r,r1,r2 registers
ccr,a,b,d,x,y,sp,pc
-x x- register indexed, pre or
,-x ,x- post autodecrement by 1
n,-x n,x- register indexed, pre or
post autodecrement by 1 - 8
+x x+ register indexed, pre or
,+x ,x+ post autoincrement by 1
n,+x n,x+ register indexed, pre or
post autoincrement by 1 - 8
offset,x register indexed addressing
-16 <= offset <= 15 --- 5-bit
-256 <= offset <= -17 --- 9-bit
16 <= offset <= 255 --- 9-bit
-32768 <= offset <= -257 --- 16-bit
256 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
[offset,x] register indexed indirect addressing
-32768 <= offset <= 32767 --- 16-bit
[,x] register indexed indirect addressing
AS68(HC[S])12 ASSEMBLER PAGE AP-4
68HC(S)12 INSTRUCTION SET
zero offset
a,x accumulator offset indexed addressing
[d,x] d accumulator offset indexed
indirect addressing
The terms data, dir, label, offset, and ext may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 68HC(S)12 technical data for valid
modes.
AP.3.1 Inherent Instructions
aba bgnd cba
daa dex dey
ediv edivs emul
emuls fdiv idiv
idivs inx iny
mem mul nop
psha pshb pshc
pshd pshx pshy
pula pulb pulc
puld pulx puly
rev revw rtc
rti rts sba
stop swi tab
tba wai wav
wavr
AS68(HC[S])12 ASSEMBLER PAGE AP-5
68HC(S)12 INSTRUCTION SET
AP.3.2 Short Branch Instructions
bcc label bcs label
beq label bge label
bgt label bhi label
bhis label bhs label
ble label blo label
blos label bls label
blt label bmi label
bne label bpl label
bra label brn label
bvc label bvs label
bsr label
AP.3.3 Long Branch Instructions
lbcc label lbcs label
lbeq label lbge label
lbgt label lbhi label
lbhis label lbhs label
lble label lblo label
lblos label lbls label
lblt label lbmi label
lbne label lbpl label
lbra label lbrn label
lbvc label lbvs label
AP.3.4 Branch on Decrement, Test, or Increment
dbeq r,label dbne r,label
ibeq r,label ibne r,label
tbeq r,label tbne r,label
AP.3.5 Bit Clear and Set Instructions
bclr [],#data
bset [],#data
AS68(HC[S])12 ASSEMBLER PAGE AP-6
68HC(S)12 INSTRUCTION SET
AP.3.6 Branch on Bit Clear or Set
brclr [],#data,label
brset [],#data,label
AP.3.7 Single Operand Instructions
asla aslb
asl []
asra asrb
asr []
clra clrb
clr []
coma comb
com []
deca decb
dec []
inca incb
inc []
lsla lslb
lsl []
lsra lsrb
lsr []
nega negb
neg []
rola rolb
rol []
rora rorb
ror []
tsta tstb
tst []
AS68(HC[S])12 ASSEMBLER PAGE AP-7
68HC(S)12 INSTRUCTION SET
AP.3.8 Double Operand Instructions
adca [] adcb []
adda [] addb []
anda [] andb []
bita [] bitb []
cmpa [] cmpb []
eora [] eorb []
ldaa [] <=> lda []
ldab [] <=> ldb []
oraa [] <=> ora []
orab [] <=> orb []
sbca [] sbcb []
staa [] <=> sta []
stab [] <=> stb []
suba [] subb []
AP.3.9 Move Instructions
movb [],[] movw [],[]
AP.3.10 D-register Instructions
addd [] subd []
cpd [] <=> cmpd []
ldd [] std []
AS68(HC[S])12 ASSEMBLER PAGE AP-8
68HC(S)12 INSTRUCTION SET
AP.3.11 Index/Stack Register Instructions
cps [] <=> cmps []
cpx [] <=> cmpx []
cpy [] <=> cmpy []
lds []
ldx [] ldy []
leas []
leax [] leay []
sts []
stx [] sty []
AP.3.12 Jump and Jump/Call to Subroutine Instructions
call [],pg
jmp [] jsr []
AP.3.13 Other Special Instructions
emacs []
emaxd [] emaxm []
emind [] eminm []
etbl []
maxa [] maxm []
mina [] minm []
tbl [] trap #data
AP.3.14 Register - Register Instructions
exg r1,r2 sex r1,r2
tfr r1,r2
AS68(HC[S])12 ASSEMBLER PAGE AP-9
68HC(S)12 INSTRUCTION SET
AP.3.15 Condition Code Register Instructions
andcc #data orcc #data
AP.3.16 M68HC11 Compatibility Mode Instructions
abx aby clc
cli clv des
ins sec sei
sev tap tpa
tsx tsy txs
tys xgdx xgdy
APPENDIX AQ
AS6816 ASSEMBLER
AQ.1 68HC16 REGISTER SET
The following is a list of the 68HC16 registers used by AS6816:
a,b - 8-bit accumulators
d - 16-bit accumulator
e - 16-bit accumulator
x,y,z - index registers
k - address extension register
s - stack pointer
ccr - condition code
AQ.2 68HC16 INSTRUCTION SET
The following tables list all 68HC16 mnemonics recognized by
the AS6816 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6816:
#data immediate data
byte or word data
#xo,#yo local immediate data (mac / rmac)
label branch label
r register
ccr,a,b,d,e,x,y,z,s
,x zero offset register indexed addressing
,x8
AS6816 ASSEMBLER PAGE AQ-2
68HC16 INSTRUCTION SET
,x16
offset,x register indexed addressing
0 <= offset <= 255 --- 8-bit
-32768 <= offset <= -1 --- 16-bit
256 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
offset,x8 unsigned 8-bit offset indexed addressing
offset,x16 signed 16-bit offset indexed addressing
e,x accumulator offset indexed addressing
ext extended addressing
bank 64K bank number (jmp / jsr)
The terms data, label, offset, bank, and ext may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6816 technical data for valid modes.
AQ.2.1 Instruction Notes
Several instructions have argument conditions that can be
confusing to the uninitiated. The AIS, AIX, AIY, AIZ, ADDD, and
ADDE instructions have 8 and 16 bit immediate forms:
AIS ii and
AIS jjkk
Where each argument is sign extended to 20 bits. This means
that the 8 bit value is between -128 and +127 and the 16 bit
value is between -32768 and +32765. The assembler checks for a
constant argument with a value from -128 to +127 and emits the
8 bit opcode and signed 8 bit value. This implies that that an
argument 0xFC, often used to specify a value of -4 when dealing
with 8 bit arguments, is not -4 but +252. The assembler will
emit the 16 bit opcode and the value 0x00FC, not what was ex-
pected.
AS6816 ASSEMBLER PAGE AQ-3
68HC16 INSTRUCTION SET
AQ.2.2 Inherent Instructions
aba abx aby abz
ace aced ade adx
ady adz aex aey
aez bgnd cba daa
ediv edivs emul emuls
fdiv fmuls idiv ldhi
lpstop mul nop psha
pshb pshmac pula pulb
pulmac rtr rts sba
sde sted swi sxt
tab tap tba tbek
tbsk tbxk tbyk tbzk
tde tdmsk tdp ted
tedm tekb tem tmer
tmet tmxed tpa tpd
tskb tsx tsy tsz
txkb txs txy txz
tykb tys tyx tyz
tzkb tzs tzx tzy
wai xgab xgde xgdx
xgdy xgdz xgex xgey
xgez
AQ.2.3 Push/Pull Multiple Register Instructions
pshm r,... pulm r,...
AQ.2.4 Short Branch Instructions
bcc label bcs label
beq label bge label
bgt label bhi label
bhis label bhs label
ble label blo label
blos label bls label
blt label bmi label
bne label bpl label
bra label brn label
bvc label bvs label
bsr label
AS6816 ASSEMBLER PAGE AQ-4
68HC16 INSTRUCTION SET
AQ.2.5 Long Branch Instructions
lbcc label lbcs label
lbeq label lbge label
lbgt label lbhi label
lbhis label lbhs label
lble label lblo label
lblos label lbls label
lblt label lbmi label
lbne label lbpl label
lbra label lbrn label
lbvc label lbvs label
lbsr label
AQ.2.6 Bit Manipulation Instructions
bclr [],#data
bset [],#data
brclr [],#data,label
brset [],#data,label
AS6816 ASSEMBLER PAGE AQ-5
68HC16 INSTRUCTION SET
AQ.2.7 Single Operand Instructions
asla aslb
asld asle
aslm
asl [] aslw []
asra asrb
asrd asre
asrm
asr [] asrw []
clra clrb
clrd clre
clrm
clr [] clrw []
coma comb
comd come
com [] comw []
deca decb
dec [] decw []
inca incb
inc [] incw []
lsla lslb
lsld lsle
lslm
lsl [] lslw []
lsra lsrb
lsrd lsre
lsr [] lsrw []
nega negb
negd nege
neg [] negw []
rola rolb
rold role
rol [] rolw []
rora rorb
rord rore
ror [] rorw []
tsta tstb
AS6816 ASSEMBLER PAGE AQ-6
68HC16 INSTRUCTION SET
tsta tste
tst [] tstw []
AQ.2.8 Double Operand Instructions
adca [] adcb []
adcd [] adce []
adda [] addb []
addd [] adde []
ais [] aix []
aiy [] aiz []
anda [] andb []
andd [] ande []
bita [] bitb []
cmpa [] cmpb []
cpd [] cpe []
eora [] eorb []
eord [] eore []
ldaa [] ldab []
ldd [] lde []
oraa [] orab []
ord [] ore []
sbca [] sbcb []
sbcd [] sbce []
staa [] stab []
std [] ste []
suba [] subb []
subd [] sube []
AS6816 ASSEMBLER PAGE AQ-7
68HC16 INSTRUCTION SET
AQ.2.9 Index/Stack Register Instructions
cps [] cpx []
cpy [] cpz []
lds [] ldx []
ldy [] ldz []
sts [] stx []
sty [] stz []
AQ.2.10 Jump and Jump to Subroutine Instructions
jmp bank,[] jsr bank,[]
AQ.2.11 Condition Code Register Instructions
andp #data orp #data
AQ.2.12 Multiply and Accumulate Instructions
mac #data rmac #data
mac #xo,#yo rmac #xo,#yo
APPENDIX AR
AS68CF ASSEMBLER
The ColdFire assembler, AS68CF, supports the instruction set
as described in the Freescale CFPRM Rev 3 (C) 03/2005 manual.
Additional instructions have been added to ColdFire as the core
has matured. Many are included in this version of the assem-
bler.
This assembler does not support cycle counts per instruction
as the ColdFire is available in chip or IP Core form.
AR.1 AS6CF ASSEMBLER SPECIFIC DIRECTIVES
AR.1.1 .setdp Directive
Format:
.setdp [base [,area]]
The .setdp directive is used to inform the assembler of the
current direct page region and the offset address within the
selected area. The normal invocation methods are:
.area DIRECT (PAG)
.setdp
or
.setdp #,DIRECT
AS68CF ASSEMBLER PAGE AR-2
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
AS68CF has two paging regions, the first 32K bytes and the
last 32K bytes of the 32-bit addressing space. The paged ad-
dressing ranges are 0x00000000-0x00007FFF and
0xFFFF8000-0xFFFFFFFF. Define a different area for each of the
regions:
.area LOPAGE (PAG)
.setdp 0x00000000,LOPAGE
.area HIPAGE (PAG)
.setdp 0xFFFF8000,HIPAGE
These two regions must both be linked with a base address of
0x00000000 to position them so that instructions can use the
16-bit short forms to access these regions. Explicit direct
page addressing is invoked by using the '*' prefix to a label or
symbol. Automatic direct page addressing can be invoked by ena-
bling the autodpcnst (Automatic Direct Page Constants) and/or
the autodpsmbl (Automatic Direct Page Symbols) options.
The assembler verifies that any local variable used in a
direct variable reference is located in one of these areas. Lo-
cal variable and constant value direct access addresses are
checked to be within the paging address ranges. The linker will
check all external direct page relocations to verify that they
are within the correct area.
External global references are normally specified using the
.globl directive. However the two paging areas of AS68K require
additional information for the external references. This is
done by the directives .lodpgbl and .hidpgbl.
AR.1.2 .lodpgbl Directive
Format:
.lodpgbl arg1, arg2, ...
Where the arguments are labels or
symbols with values that are in the
0x00000000-0x00007FFF direct page.
If the low page area has not been
specified then the arguments are
defined as being in the current area.
AS68CF ASSEMBLER PAGE AR-3
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
AR.1.3 .hidpgbl Directive
Format:
.hidpgbl arg1, arg2, ...
Were the arguments are labels or
symbols with values that are in the
0xFFFF8000-0xFFFFFFFF direct page.
If the high page area has not been
specified then the arguments are
defined as being in the current area.
AR.1.4 .flt16, .flt32, and .flt64
There are three supported floating point formats available in
the AS68CF assembler where arg1, arg2, ... represent one or
more floating-point numbers.
Format:
.flt16 arg1, arg2, ...
.flt16 causes one word of storage
to be generated for each argument.
Word: 16-Bit Floating Point Format:
15 14 7 6 0
S EEEEEEEE MMMMMMM
Mantissa (7 bits)
Exponent (8 bits) Biased
Sign (1 bit)
AS68CF ASSEMBLER PAGE AR-4
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
Format:
.flt32 arg1, arg2, ...
.flt32 causes two words of storage
to be generated for each argument.
Single: 32-Bit Floating Point:
31 30 23 22 0
S EEEEEEEE MMM.....MMM
Mantissa (23 bits)
Exponent (8 bits) Biased
Sign (1 bit)
Format:
.flt64 arg1, arg2, ...
.flt64 generates 4 words of storage
for each argument.
Double: 64-Bit Floating Point
63 62 52 51 0
S EEEEEEEEEEE MMM.....MMM
Mantissa (52 bits)
Exponent (11 bits) Biased
Sign (1 bit)
The arguments are evaluated and the results are stored in the
object module. Unlike the .word directive only the sign opera-
tors (+) and (-) may be used in the evaluation of a
floating-point argument. No arithmetic operations are allowed
in the floating-point argument.
A floating-point number is represented by a string of decimal
digits. The string (which can be a single digit in length) may
contain an optional decimal point and may be followed by an op-
tional exponent indicator in the form of 'E' or 'e' followed by
a signed decimal integer exponent. The number may not contain
embedded blanks, tabs, or angle brackets and may not be an ex-
pression.
The AS68CF assembler returns a value of the appropriate size
and precision via one of the floating-point directives. The
values returned may be truncated or rounded as selected by the
'.enabl (fpt)' or '.dsabl (fpt)' respectively.
AS68CF ASSEMBLER PAGE AR-5
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
Floating-point numbers are normally rounded. That is, when a
floating-point number exceeds the limits of the field in which
it is to be stored, the high-order bit of the unretained portion
is added to the low-order bit of the retained portion.
AR.1.5 ^F - The Temporary Floating-Point Operator
Format:
^F
^F is a unary operator for numeric control which allows you
to specify an argument that is either a 1-word or 2-word
floating-point number. For example, the following statement:
A: MOVE.W #^F3.7,D0
creates an immediate 1-word floating-point number containing the
value 3.7 formatted as shown in the .flt16 description in a pre-
vious section.
The following statement:
B: MOVE.L #^F3.7,D0
creates an immediate 2-word floating-point number containing the
value 3.7 formatted as shown in the .flt32 description in a pre-
vious section.
The ^F operator is only allowed in an instruction.
AS68CF ASSEMBLER PAGE AR-6
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
AR.1.6 .enabl and .dsabl
Format:
.enabl (arg1, arg2, ...)
.dsabl (arg1, arg2, ...)
where: arg1, arg2, ... represent one or more
of the following options
alt Allow Alternate Instructions
autodpcnst Automatic Direct Paging For Constants
autodpsmbl Automatic Direct Paging For Symbols
mac Multiply-Accumulate Unit
emac Extended Multiply-Accumulate Unit
flt Floating Point Instructions
fpt Floating-Point Truncation
alt: controls whether the automatic translation of instructions
to alternate instruction forms is enabled. The default is
enabled. The following translations may be performed:
MOVE [],An -> MOVEA [],An
MOVE #,Dn -> MOVEQ #,Dn (#: -128 to +127)
ADD Dn,An -> ADDA Dn,An
ADD #,Dn -> ADDI #,Dn
ADD #,Dn -> ADDQ #,Dn (#: 1 to 8)
AND #,Dn -> ANDI #,Dn
CMP [],An -> CMPA [],An
CMP #,Dn -> CMPI #,Dn
EOR #,[] -> EORI #,[]
OR #,Dn -> ORI #,Dn
SUB [],An -> SUBA [],An
SUB #,Dn -> SUBI #,Dn
SUB #,Dn -> SUBQ #,Dn (#: 1 to 8)
autodpcnst: controls whether instructions without length quali-
fies, .B, .W, .L, can automatically use short forms when the
constants are within the ranges of 0x00000000-0x00007FFF (low
paging region) or 0xFFFF8000-0xFFFFFFFF (high paging region) or
are external globals. The paging regions must have been speci-
fied for this option to take effect. The default is enabled.
AS68CF ASSEMBLER PAGE AR-7
AS6CF ASSEMBLER SPECIFIC DIRECTIVES
autodpsmbl: controls whether instructions without length quali-
fies, .B, .W, .L, can automatically use short forms when the
symbols are within the ranges of 0x00000000-0x00007FFF (low pag-
ing region) or 0xFFFF8000-0xFFFFFFFF (high paging region) or are
external globals. The paging regions must have been specified
for this option to take effect. The default is enabled.
mac: controls whether the multiply-accumulate instructions are
assembled. Normally disabled.
emac: controls whether the extended multiply-accumulate in-
structions are assembled. Normally disabled.
flt: controls whether floating-point instructions are as-
sembled. Normally disabled.
fpt: controls whether floating-point truncation is active.
Normal mode is fpt disabled and rounding is enabled.
Note that 'mac' and 'emac' are mutually exclusive, enabling
one disables the other.
AR.2 COLDFIRE REGISTER SET
The following is a list of the ColdFire registers used by
AS68CF. Eight 32-bit data registers provide data as bytes,
words, and longs. Eight address registers provide addresses as
words or longs. Other registers include the 32-bit program
counter and the 8-bit status register. The control registers
are not described in this document.
AS68CF ASSEMBLER PAGE AR-8
COLDFIRE REGISTER SET
Data Registers
|- Long ---------------------------|
|- Word-----------|
|- Byte -|
31 16 15 8 7 0
|----------------|--------|--------|
|- | | -| D0
|----------------|--------|--------|
|- | | -| D1
|----------------|--------|--------|
|- | | -| D2
|----------------|--------|--------|
|- | | -| D3
|----------------|--------|--------|
|- | | -| D4
|----------------|--------|--------|
|- | | -| D5
|----------------|--------|--------|
|- | | -| D6
|----------------|--------|--------|
|- | | -| D7
|----------------|--------|--------|
AS68CF ASSEMBLER PAGE AR-9
COLDFIRE REGISTER SET
Address Registers
|- Long --------------------------|
|- Word----------|
31 16 15 0
|----------------|----------------|
|- | -| A0
|----------------|----------------|
|- | -| A1
|----------------|----------------|
|- | -| A2
|----------------|----------------|
|- | -| A3
|----------------|----------------|
|- | -| A4
|----------------|----------------|
|- | -| A5
|----------------|----------------|
|- | -| A6
|----------------|----------------|
|- User Stack Pointer -|
|----------------|----------------| A7 / SP
|- Supervisor Stack Pointer -|
|----------------|----------------|
31 0
|--------------------------------|
|- Program Counter |
|--------------------------------|
|--------|--------|
Status Register| System | User |
|--------|--------|
AS68CF ASSEMBLER PAGE AR-10
COLDFIRE REGISTER SET
AR.3 COLDFIRE ADDRESSING MODES
Mode Register Syntax Addressing Mode
----- -------- -------- ----------------------------
000 Reg # Dn Data Reg Dir
001 Reg # An Addr Reg Dir
010 Reg # (An) Addr Reg Ind
011 Reg # (An)+ Addr Reg Ind w/Postinc
100 Reg # -(An) Addr Reg Ind w/Predec
101 Reg # d16(An) Addr Reg Ind w/Disp
or (d16,An)
110 Reg # d8(An,Rn) Addr Reg Ind w/Disp w/Index
or (d8,An,Rn)
111 000 xxx Absolute Short
or (xxx).W
111 001 xxxxx Absolute Long
or (xxxxx).L
111 010 d16(PC) Prog Ctr Ind w/Disp
or (d16,PC)
111 011 d8(PC,Rn) Prog Ctr Ind w/Disp w/Index
or (d8,PC,Rn)
111 100 #xxx Immediate
or #(xxx).W Short Immediate
or #(xxx).L Long Immediate
Where Rn is An or Dn
Note that Rn supports Rn.W and Rn.L forms and
an optional scale factor of *1, *2, or *4 when
the addressing mode is d8(An,Rn) or d8(PC,Rn)
The following short forms are also supported:
@An <==> (An)
@An+ <==> (An)+
-@An <==> -(An)
AS68CF ASSEMBLER PAGE AR-11
COLDFIRE ADDRESSING MODES
AR.4 COLDFIRE BASE INSTRUCTION SET
The following tables list all the instructions found in this
implementation of the ColdFire assembler. The (.B,.W,.L) indi-
cates an instruction has byte, word, and long forms. The
brackets '[]' indicate one of the described addressing modes.
Note that most instructions do not support all addressing modes,
see the appropriate data sheets for allowed modes.
For Instructions having multiple sizes the assembler automa-
tically selects an appropriate size or a default size if the
size suffix is blank. This most often defaults to using the
word form. For those instructions with only a single size the
sizing suffix is optional.
The ColdFire instructions have a maximum length of three
words (48 bits). This limits instructions to specific address-
ing modes. Double operand instructions will report certain
pairs of addressing modes as illegal if the total instruction
size exceeds the three word limit.
Ry Source Register (Dy or Ay)
Rx Destination Register (Dx or Ax)
CRy Source Control Register
CRx Destination Control Register
Dw Second Destination Register
Dc First Compare Register
Du Second Compare Register
[]y Source Addressing Mode
[]x Destination Addressing Mode
# A Source Number
AS68CF ASSEMBLER PAGE AR-12
COLDFIRE BASE INSTRUCTION SET
AR.4.1 MOVE Instructions
MOVE (.B,.W,.L) []y,[]x Source To Destination
MOVE (.W) CCR,Dx From Condition Code Register
MOVE (.B) Dy,CCR To Condition Code Register
MOVE (.B) #,CCR To Condition Code Register
MOVE (.W) SR,[]x From Status Register
MOVE (.W) []y,SR To Status Register
MOVE (.L) USP,Ax From User Stack Pointer
MOVE (.L) Ay,USP To User Stack Pointer
MOVEA (.W,.L) []y,Ax To Address Register
MOVEC (.L) Ry,CRx To Control register
MOVEM (.W,.L) Rlist,[]x From Registers In List
MOVEM (.W,.L) []y,Rlist To Registers In List
MOVEQ (.L) #,[]x Signed 8-Bit # To Destination
MOV3Q (.L) #,[]x -1,1-7 3-Bit # To Destination
MVS (.B,.W) []y,Dx Move With Sign Extend To Long
MVZ (.B,.W) []y,Dx Move With Zero Fill To Long
AR.4.2 Double Operand
ADD (.L) []y,Dx ADD Source To Destination
ADD (.L) Dy,[]x ADD Source To Destination
ADDA (.L) []y,Ax ADD Source To An
ADDX (.L) Dy,Dx ADD Source and X (Carry)
To Destination
AND (.L) []y,Dx AND Source With Dn
AND (.L) Dy,[]x AND Dn With Destination
or Rn > [] Upper Bound, TRAP
CMP (.B,.W,.L) []y,[]x Destination - Source, Set CCs
CMPA (.W,.L) []y,Ax Compare Source With An
DIVS (.W,.L) []y,Dx Signed Destination/Source
DIVU (.W,.L) []y,Dx UnSigned Destination/Source
EOR (.L) Dy,[]x XOR Source With Destination
MULS (.W,.L) []y,Dx Signed Source*Destination
MULU (.W,.L) []y,Dx UnSigned Source*Destination
OR (.L) []y,[]x Source ORed With Destination
SUB (.L) []y,Dx Subtract Source From Dn
SUB (.L) Dy,[]x Subtract Source From Destination
SUBA (.L) []y,Ax Subtract Source From An
SUBX (.L) Dy,Dx Subtract Source and X (Carry)
From Destination
AS68CF ASSEMBLER PAGE AR-13
COLDFIRE BASE INSTRUCTION SET
AR.4.3 Immediate Instructions
ADDI (.L) #,[]x ADD Immediate To Destination
ADDQ (.L) #,[]x ADD 1-8 To Destination
ANDI (.L) #,[]x AND Immediate To Destination
CMPI (.B,.W,.L) #,[]x CMP Immediate With Destination
EORI (.L) #,[]x XOR Immediate With Destination
ORI (.L) #,[]x OR Immediate With Destination
SUBI (.L) #,[]x SUB Immediate From Destination
SUBQ (.L) #,[]x SUB 1-8 From Destination
AR.4.4 Single Operand
CLR (.B,.W,.L) []x Clear Destination
EXT (.W,.L) Dx Extend Byte To Word
or Word To Long
EXTB (.L) Dx Extend Byte To Long
NEG (.L) Dx Negate Destination
NEGX (.L) Dx Negate Dest. With X (Carry)
NOT (.L) Dx Complement Destination
TST (.B,.W,.L) []x Test Destination
AR.4.5 Shift And Rotate
ASR (.L) Dy,Dx Arithmetic Shift Right
ASR (.L) #,Dx Arithmetic Shift Right
ASL (.L) Dy,Dx Arithmetic Shift Left
ASL (.L) #,Dx Arithmetic Shift Left
LSR (.L) Dy,Dx Logical Shift Right
LSR (.L) #,Dx Logical Shift Right
LSL (.L) Dy,Dx Logical Shift Left
LSL (.L) #,Dx Logical Shift Left
AS68CF ASSEMBLER PAGE AR-14
COLDFIRE BASE INSTRUCTION SET
AR.4.6 Bit Manipulation
BCHG (.B,.L) Dy,[]x Test Bit And Change
BCHG (.B,.L) #,[]x
BCLR (.B,.L) Dy,[]x Test A Bit And Clear
BCLR (.B,.L) #,[]x
BSET (.B,.L) Dy,[]x Test A Bit And Set
BSET (.B,.L) #,[]x
BTST (.B,.L) Dy,[]x Test A Bit
BTST (.B,.L) #,[]x
BITREV (.L) Dy Bit Reverse Register
BYTEREV (.L) Dy Byte Reverse Register
SWAP (.W) Dx Swap Words
TAS (.B) []x Test And Set An Operand
AR.4.7 Branch On Condition Instructions
The short (.S) branch instructions have a range of -126 to
+129 bytes relative to the address of the branch instruction.
The word (.W) branch instructions have a range of -32,766 to
+32,769 bytes relative to the address of the branch instruction.
The instruction argument is normally an address.
BCC label Carry Clear BLS label Lower Or Same
BCS label Carry Set BLT label Less Than
BEQ label Equal BMI label Minus
BGE label Greater Or Equal BNE label Not Equal
BGT label Greater Than BPL label Plus
BHI label Higher BVC label Overflow Clear
BLE label Less Or Equal BVS label Overflow Set
BHS label Higher Or Same BLO label Lower Than
BRA label Branch Always
BSR label Branch To Subroutine
Branch instructions without .S, .W, or .L are automatically
sized according to the branch range. External branches without
.S or .W are always .L sized.
AS68CF ASSEMBLER PAGE AR-15
COLDFIRE BASE INSTRUCTION SET
AR.4.8 Set According To Condition
The Condition is tested and if True the addressed byte is set
to all 1s else the addressed byte is set to all 0s.
SCC (.B) []x Carry Clear
SHS (.B) []x Higher Or Same (SCC)
SLS (.B) []x Lower Or Same
SCS (.B) []x Carry Set
SLO (.B) []x Lower (SCS)
SLT (.B) []x Less Than
SEQ (.B) []x Equal
SMI (.B) []x Minus
SF (.B) []x False
SNE (.B) []x Not Equal
SGE (.B) []x Greater Or Equal
SPL (.B) []x Plus
SGT (.B) []x Greater Than
ST (.B) []x True
SHI (.B) []x Higher
SVC (.B) []x Overflow Clear
SLE (.B) []x Less Or Equal
SVS (.B) []x Overflow Set
AR.4.9 Trap False
TPF PC + 2 -> PC, Opcode Only
TPF.W PC + 4 -> PC, Opcode Only
TPF.L PC + 6 -> PC, Opcode Only
TPF (.W,.L) # Autoselect TPF.W or TPF.L
TPF.W # PC + 4 -> PC, Opcode + Word
TPF.L # PC + 6 -> PC, Opcode + Long
AS68CF ASSEMBLER PAGE AR-16
COLDFIRE BASE INSTRUCTION SET
AR.4.10 Other Instructions
JMP []y Jump To Location
JSR []y Jump To Subroutine
LEA (.L) []y,Ax Load Effective Address
PEA (.L) []y Push Effective Address
Push And Possibly Invalidate Cache
CPUSHL dc,(Ax) Data Cache
CPUSHL ic,(Ax) Instruction Cache
CPUSHL bc,(Ax) Both Caches
FF1 (.L) Dx Find First 1 In Register
HALT Halt The CPU
ILLEGAL Illegal Instruction Exception
INTOUCH (Ay) Instruction Fetch Touch
LINK Ay,# Link And Allocate
NOP No Operation
PULSE Generate Unique
Processor Status
REMS (.L) []y,Dw:Dx Signed Divide Remainder
REMU (.L) []y,Dw:Dx Unsigned Divide Remainder
RTE Return From Exception
RTS Return From Subroutine
SATS (.L) []x Signed Saturate
STRLDSR (.W) # Store/Load Status Register
STOP # Load Status Register And Stop
TRAP # Trap To Vector (0-15)
UNLK Ax Load Stack Pointer, Pop Stack
WDDATA (.B,.W,.L) []y Write To Debug Data
WDEBUG (.L) []y Write Debug Control Register
AR.4.11 Undocumented Instructions
The following instructions may have been restored in more re-
cent versions of the Coldfire core.
CAS Dc,Du,[]y Compare And Swap With Operand
CAS2 Dc1:Dc2,Du1:Du2,(Ry1):(Ry2)
CHK (.W,.L) []y,Dx Dn < 0 or Dn > [], TRAP
CHK2 (.B.,W,.L) []y,Rx Rn < [] Lower Bound
CMP2 (.B,.W,.L) []y,Rx Upper/Lower Bounds Check
AS68CF ASSEMBLER PAGE AR-17
MULTIPLY-ACCUMULATE INSTRUCTION SET
AR.5 MULTIPLY-ACCUMULATE INSTRUCTION SET
The syntax: Arguments within { } are options.
Ry Source Register (Dy or Ay)
Rx Destination Register (Dx or Ax)
Rw Load Destination Register (Dw or Aw)
{U,L} U For Upper Word, L For Lower Word
{<<,>>} << For Product<<1
>> For Product>>1
{&} ANDed With MASK Register
AR.5.1 Multiply-Accumulate Operations
Multiply Accumulate
MAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>}
MAC (.L) Ry,Rx{<<,>>}
Multiply Accumulate With Load
MAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},[]y{&},Rw
MAC (.L) Ry,Rx{<<,>>},[]y{&},Rw
Multiply Subtract
MSAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>}
MSAC (.L) Ry,Rx{<<,>>}
Multiply Subtract With Load
MSAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},[]y{&},Rw
MSAC (.L) Ry,Rx{<<,>>},[]y{&},Rw
AS68CF ASSEMBLER PAGE AR-18
MULTIPLY-ACCUMULATE INSTRUCTION SET
AR.5.2 Move Operations
MOVE (.L) ACC,Rx Move From Accumulator
MOVE (.L) Ry,ACC Move To Accumulator
MOVE (.L) #,ACC
MOVE (.L) MACSR,Rx Move From MAC CSR
MOVE (.L) Ry,MACSR Move To MAC CSR
MOVE (.L) #,MACSR
MOVE (.L) MASK,Rx Move From MASK
MOVE (.L) Ry,MASK Move To MASK
MOVE (.L) #,MASK
MOVE (.L) MACSR,CCR Move From MACSR To CCR
AR.6 EXTENDED MULTIPLY-ACCUMULATE INSTRUCTION SET
The syntax: Arguments within { } are options.
ACCy Source FP Accumulator
ACCx Destination FP Accumulator
ACCw Second Destination FP Accumulator
Ry Source Register (Dy or Ay)
Rx Destination Register (Dx or Ax)
Rw Load Destination Register (Dw or Aw)
{U,L} U For Upper Word, L For Lower Word
{<<,>>} << For Product<<1
>> For Product>>1
{&} ANDed With MASK Register
AS68CF ASSEMBLER PAGE AR-19
EXTENDED MULTIPLY-ACCUMULATE INSTRUCTION SET
AR.6.1 Multiply-Accumulate Operations
Multiply Accumulate
MAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>}
MAC (.L) Ry,Rx{<<,>>}
Multiply Accumulate With Load
MAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},[]y{&},Rw
MAC (.L) Ry,Rx{<<,>>},[]y{&},Rw
Multiply Subtract
MSAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},ACCx
MSAC (.L) Ry,Rx{<<,>>},ACCx
Multiply Subtract With Load
MSAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},[]y{&},Rw,ACCx
MSAC (.L) Ry,Rx{<<,>>},[]y{&},Rw,ACCx
Multiply And Add To First Accumulator
Add To Second Accumulator
MAAAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},ACCx,ACCw
MAAAC (.L) Ry,Rx{<<,>>},ACCx,ACCw
Multiply And Add To First Accumulator
Subtract From Second Accumulator
MASAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},ACCx,ACCw
MASAC (.L) Ry,Rx{<<,>>},ACCx,ACCw
Multiply And Subtract From First Accumulator
Add To Second Accumulator
MSAAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},ACCx,ACCw
MSAAC (.L) Ry,Rx{<<,>>},ACCx,ACCw
Multiply And Subtract From First Accumulator
Subtract From Second Accumulator
MSSAC (.W) Ry.{U,L},Rx.{U,L}{<<,>>},ACCx,ACCw
MSSAC (.L) Ry,Rx{<<,>>},ACCx,ACCw
AS68CF ASSEMBLER PAGE AR-20
EXTENDED MULTIPLY-ACCUMULATE INSTRUCTION SET
AR.6.2 Move Operations
MOVCLR (.L) ACCy,Rx Move From Accumulator
And Clear Accumulator
MOVE (.L) ACCy,Rx Move From Accumulator
MOVE (.L) Ry,ACCx Move To Accumulator
MOVE (.L) #,ACCx
MOVE (.L) ACCext01,Rx Move From Accumulator
0 And 1 Extensions
MOVE (.L) Ry,ACCext01 Move To Accumulator
0 And 1 Extensions
MOVE (.L) #,ACCext01 Move To Accumulator
0 And 1 Extensions
MOVE (.L) ACCext23,Rx Move From Accumulator
2 And 3 Extensions
MOVE (.L) Ry,ACCext23 Move To Accumulator
2 And 3 Extensions
MOVE (.L) #,ACCext23 Move To Accumulator
2 And 3 Extensions
MOVE (.L) MACSR,Rx Move From The MACSR
MOVE (.L) Ry,MACSR Move To The MACSR
MOVE (.L) #,MACSR
MOVE (.L) MASK,Rx Move From The MASK
MOVE (.L) Ry,MASK Move To The MASK
MOVE (.L) #,MASK
MOVE (.L) ACCy,ACCx Copy An Accumulator
MOVE (.L) MACSR,CCR Move From The MACSR
To The CCR
AR.7 COLDFILE FLOATING POINT INSTRUCTION SET
The floating point instruction set for the ColdFire is sum-
marized in this section.
The floating point selection options:
.enabl (flt) Enable Floating Point
.enabl (fpt) Enable Floating Point Truncation
AS68CF ASSEMBLER PAGE AR-21
COLDFILE FLOATING POINT INSTRUCTION SET
The following sections describe the floating point instruc-
tions separated into these instruction groups:
Data Movement
Dyadic Operations
Monadic Operations
Program Control
System Control
The tables contain the operand syntax and the operand format
which is summarized here:
FPy A floating point SRC register (FP0-FP7)
FPx A floating point DST register (FP0-FP7)
FPcr A Floating point Control Register
[]y SRC addressing mode
[]x DST addressing mode
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Last Updated: September 2023